AGESA vendorcode: Fix type mismatch

Fix is required to compile AGESA ramstage without raminit.

Change-Id: I783883fa7a12e8a647aa432535bb990a47257e9b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14416
Tested-by: build bot (Jenkins)
Reviewed-by: Kerry Sheh <shekairui@gmail.com>
This commit is contained in:
Kyösti Mälkki 2016-04-19 15:17:50 +03:00 committed by Stefan Reinauer
parent e0383d2ce8
commit defbdcf3e5
6 changed files with 28 additions and 28 deletions

View File

@ -2563,7 +2563,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
NULL
0
};
/*---------------------------------------------------------------------------------------------------
@ -2604,12 +2604,12 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
NULL
0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
NULL
0
};
#endif
/*---------------------------------------------------------------------------------------------------

View File

@ -4033,7 +4033,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
NULL
0
};
/*---------------------------------------------------------------------------------------------------
@ -4086,18 +4086,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
NULL
0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
NULL
0
};
#endif
/*---------------------------------------------------------------------------------------------------

View File

@ -3865,7 +3865,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
NULL
0
};
/*---------------------------------------------------------------------------------------------------
@ -3918,18 +3918,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
NULL
0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
NULL
0
};
#endif
/*---------------------------------------------------------------------------------------------------

View File

@ -3629,7 +3629,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
NULL
0
};
/*---------------------------------------------------------------------------------------------------
@ -3674,18 +3674,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
NULL
0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
NULL
0
};
#endif
/*---------------------------------------------------------------------------------------------------

View File

@ -4687,7 +4687,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
NULL
0
};
/*---------------------------------------------------------------------------------------------------
@ -4744,18 +4744,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
NULL
0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
NULL
0
};
#endif
/*---------------------------------------------------------------------------------------------------

View File

@ -1556,7 +1556,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
NULL
0
};
/*---------------------------------------------------------------------------------------------------
@ -1581,18 +1581,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
NULL
0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
NULL
0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
NULL
0
};
#endif
/*---------------------------------------------------------------------------------------------------