AGESA vendorcode: Fix type mismatch
Fix is required to compile AGESA ramstage without raminit. Change-Id: I783883fa7a12e8a647aa432535bb990a47257e9b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14416 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com>
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@ -2563,7 +2563,7 @@ BOOLEAN MemFS3DefConstructorRet (
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*---------------------------------------------------------------------------------------------------
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*---------------------------------------------------------------------------------------------------
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*/
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*/
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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NULL
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0
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};
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};
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -2604,12 +2604,12 @@ BOOLEAN MemFS3DefConstructorRet (
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*/
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*/
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#if OPTION_DDR2
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#if OPTION_DDR2
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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NULL
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0
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};
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};
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#endif
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#endif
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#if OPTION_DDR3
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#if OPTION_DDR3
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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NULL
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0
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};
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};
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#endif
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#endif
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -4033,7 +4033,7 @@ BOOLEAN MemFS3DefConstructorRet (
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*---------------------------------------------------------------------------------------------------
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*---------------------------------------------------------------------------------------------------
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*/
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*/
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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NULL
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0
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};
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};
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -4086,18 +4086,18 @@ BOOLEAN MemFS3DefConstructorRet (
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*/
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*/
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#if OPTION_DDR2
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#if OPTION_DDR2
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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#if OPTION_DDR3
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#if OPTION_DDR3
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -3865,7 +3865,7 @@ BOOLEAN MemFS3DefConstructorRet (
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*---------------------------------------------------------------------------------------------------
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*---------------------------------------------------------------------------------------------------
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*/
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*/
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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NULL
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0
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};
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};
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -3918,18 +3918,18 @@ BOOLEAN MemFS3DefConstructorRet (
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*/
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*/
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#if OPTION_DDR2
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#if OPTION_DDR2
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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#if OPTION_DDR3
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#if OPTION_DDR3
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -3629,7 +3629,7 @@ BOOLEAN MemFS3DefConstructorRet (
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*---------------------------------------------------------------------------------------------------
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*---------------------------------------------------------------------------------------------------
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*/
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*/
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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NULL
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0
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};
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};
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -3674,18 +3674,18 @@ BOOLEAN MemFS3DefConstructorRet (
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*/
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*/
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#if OPTION_DDR2
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#if OPTION_DDR2
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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#if OPTION_DDR3
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#if OPTION_DDR3
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -4687,7 +4687,7 @@ BOOLEAN MemFS3DefConstructorRet (
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*---------------------------------------------------------------------------------------------------
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*---------------------------------------------------------------------------------------------------
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*/
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*/
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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NULL
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0
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};
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};
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -4744,18 +4744,18 @@ BOOLEAN MemFS3DefConstructorRet (
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*/
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*/
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#if OPTION_DDR2
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#if OPTION_DDR2
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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#if OPTION_DDR3
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#if OPTION_DDR3
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -1556,7 +1556,7 @@ BOOLEAN MemFS3DefConstructorRet (
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*---------------------------------------------------------------------------------------------------
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*---------------------------------------------------------------------------------------------------
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*/
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*/
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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MEM_FEAT_BLOCK_MAIN MemFeatMain = {
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NULL
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0
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};
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};
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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@ -1581,18 +1581,18 @@ BOOLEAN MemFS3DefConstructorRet (
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*/
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*/
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#if OPTION_DDR2
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#if OPTION_DDR2
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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#if OPTION_DDR3
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#if OPTION_DDR3
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
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NULL
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0
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};
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};
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
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NULL
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0
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};
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};
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#endif
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#endif
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/*---------------------------------------------------------------------------------------------------
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/*---------------------------------------------------------------------------------------------------
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