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soc/mediatek/mt8188: Support 4 channel DRAM in DPM init flow 

TEST=build pass
BUG=b:236331724

Signed-off-by: Xi Chen <xixi.chen@mediatek.corp-partner.google.com>
Change-Id: Ia68aca1d1e8729739246157904727123e5d001e8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66968
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Xi Chen 2022-08-18 11:23:26 +08:00 committed by Martin Roth
parent cd37368c6c
commit df0396149a
2 changed files with 3 additions and 0 deletions
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1
src/soc/mediatek/mt8188/Kconfig
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@ -11,6 +11,7 @@ config SOC_MEDIATEK_MT8188
select CACHE_MRC_SETTINGS
select MEDIATEK_BLOB_FAST_INIT
select USE_CBMEM_DRAM_INFO
select DPM_FOUR_CHANNEL
if SOC_MEDIATEK_MT8188

2
src/soc/mediatek/mt8188/Makefile.inc
View File

@ -30,6 +30,8 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
ramstage-y += ../common/auxadc.c
ramstage-y += ../common/dfd.c
ramstage-y += ../common/dpm.c
ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
ramstage-y += ../common/emi.c
ramstage-y += ../common/mcu.c
ramstage-y += ../common/mcupm.c