diff --git a/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h b/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h
index 3712fd7d01..bb53497a43 100644
--- a/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h
+++ b/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h
@@ -571,9 +571,86 @@ struct FSP_M_CONFIG {
 **/
   uint8_t                       SkipCseRbp;
 
-/** Offset 0x0136
+/** Offset 0x0136 - Npk Enable
+  Enable/Disable Npk. 0:Disable, 1:Enable, 2:Debugger, 3:Auto(Default).
+  0:Disable, 1:Enable, 2:Debugger, 3:Auto
 **/
-  uint8_t                       ReservedFspmUpd[26];
+  uint8_t                       NpkEn;
+
+/** Offset 0x0137 - FW Trace Enable
+  Enable/Disable FW Trace. 0:Disable, 1:Enable(Default).
+  $EN_DIS
+**/
+  uint8_t                       FwTraceEn;
+
+/** Offset 0x0138 - FW Trace Destination
+  FW Trace Destination. 1-NPK_TRACE_TO_MEMORY, 2-NPK_TRACE_TO_DCI, 3-NPK_TRACE_TO_BSSB,
+  4-NPK_TRACE_TO_PTI(Default).
+**/
+  uint8_t                       FwTraceDestination;
+
+/** Offset 0x0139 - NPK Recovery Dump
+  Enable/Disable NPK Recovery Dump. 0:Disable(Default), 1:Enable.
+  $EN_DIS
+**/
+  uint8_t                       RecoverDump;
+
+/** Offset 0x013A - Memory Region 0 Buffer Size
+  Memory Region 0 Buffer Size. 0-0MB(Default), 1-1MB, 2-8MB, 3-64MB, 4-128MB, 5-256MB,
+  6-512MB, 7-1GB.
+**/
+  uint32_t                      Msc0Size;
+
+/** Offset 0x013E - Memory Region 0 Buffer WrapAround
+  Memory Region 0 Buffer WrapAround. 0-n0-warp, 1-warp(Default).
+**/
+  uint8_t                       Msc0Wrap;
+
+/** Offset 0x013F - Memory Region 1 Buffer Size
+  Memory Region 1 Buffer Size, 0-0MB(Default), 1-1MB, 2-8MB, 3-64MB, 4-128MB, 5-256MB,
+  6-512MB, 7-1GB.
+**/
+  uint32_t                      Msc1Size;
+
+/** Offset 0x0143 - Memory Region 1 Buffer WrapAround
+  Memory Region 1 Buffer WrapAround. 0-n0-warp, 1-warp(Default).
+**/
+  uint8_t                       Msc1Wrap;
+
+/** Offset 0x0144 - PTI Mode
+  PTI Mode. 0-0ff, 1-x4(Default), 2-x8, 3-x12, 4-x16.
+**/
+  uint8_t                       PtiMode;
+
+/** Offset 0x0145 - PTI Training
+  PTI Training. 0-off(Default), 1-6=1-6.
+**/
+  uint8_t                       PtiTraining;
+
+/** Offset 0x0146 - PTI Speed
+  PTI Speed. 0-full, 1-half, 2-quarter(Default).
+**/
+  uint8_t                       PtiSpeed;
+
+/** Offset 0x0147 - Punit Message Level
+  Punit Message Output Verbosity Level. 0, 1(Default), 2-4=2-4.
+**/
+  uint8_t                       PunitMlvl;
+
+/** Offset 0x0148 - PMC Message Level
+  PMC Message Output Verbosity Level. 0, 1(Default), 2-4=2-4.
+**/
+  uint8_t                       PmcMlvl;
+
+/** Offset 0x0149 - SW Trace Enable
+  Enable/Disable SW Trace. 0:Disable(Default), 1:Enable.
+  $EN_DIS
+**/
+  uint8_t                       SwTraceEn;
+
+/** Offset 0x014A
+**/
+  uint8_t                       ReservedFspmUpd[6];
 } __attribute__((packed));
 
 /** Fsp M Test Configuration
diff --git a/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h b/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h
index 25346be64e..26f70a7bbd 100644
--- a/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h
+++ b/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h
@@ -71,7 +71,7 @@ struct FSP_S_CONFIG {
 
 /** Offset 0x0025 - Memory region allocation for Processor Trace
   Memory region allocation for Processor Trace, allowed range is from 4K (0x0) to
-  128MB (0xF); 0xFF: Disable. 0xFF:Disable(Default)
+  128MB (0xF); <b>0xFF: Disable. 0xFF:Disable(Default)
 **/
   uint8_t                       ProcTraceMemSize;
 
@@ -440,7 +440,7 @@ struct FSP_S_CONFIG {
   uint8_t                       Pme;
 
 /** Offset 0x0091 - HD-Audio I/O Buffer Ownership
-  Set HD-Audio I/O Buffer Ownership. 0:Disable(Default), 1:Enable.
+  Set HD-Audio I/O Buffer Ownership. 0:HD-Audio link owns all the I/O buffers(Default)
   0:HD-Audio link owns all the I/O buffers, 1:HD-Audio link owns 4 I/O buffers and
   I2S port owns 4 I/O buffers, 3:I2S port owns all the I/O buffers
 **/
@@ -788,7 +788,7 @@ struct FSP_S_CONFIG {
 
 /** Offset 0x00E4 - Enable PCIE Clock Gating
   Enable/disable PCIE Clock Gating. 0:Enable, 1:Disable(Default).
-  $EN_DIS
+  0:Enable, 1:Disable
 **/
   uint8_t                       PcieClockGatingDisabled;
 
@@ -1334,13 +1334,13 @@ struct FSP_S_CONFIG {
 
 /** Offset 0x02D2 - Skip Multi-Processor Initialization
   When this is skipped, boot loader must initialize processors before SilicionInit
-  API. 0: Initialize(Default), 1: Skip
+  API. 0: Initialize(Default), <b>1: Skip
   $EN_DIS
 **/
   uint8_t                       SkipMpInit;
 
 /** Offset 0x02D3 - DCI Auto Detect
-  Enable/disable DCI AUTO mode.
+  Enable/disable DCI AUTO mode. Enabled(Default).
   $EN_DIS
 **/
   uint8_t                       DciAutoDetect;
@@ -1467,11 +1467,9 @@ struct FSP_S_CONFIG {
 **/
   uint8_t                       PcieRpSelectableDeemphasis[6];
 
-/** Offset 0x0326 - Os Selection Mode
-  Select OS mode. 0:Windows(default), 1:Android, 2:Win7
-  0:Windows, 1:Android, 2:Win7
+/** Offset 0x0326
 **/
-  uint8_t                       OsSelection;
+  uint8_t                       UnusedUpdSpace4;
 
 /** Offset 0x0327 - Monitor Mwait Enable
   Enable/Disable Monitor Mwait. For Windows* OS, this should be Enabled. For Linux