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mainboard/opencellular/rotundu: Enable TPM 1.2 support 

* Enable support for all variants.

Change-Id: Ibdd43d8cff23d3fa1154e2b72aa6095682783fe5
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/27685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Philipp Deppenwiese 2018-07-28 19:13:04 +02:00 committed by Philipp Deppenwiese
parent 660dd00079
commit df1a065215
4 changed files with 13 additions and 3 deletions
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2
src/mainboard/opencellular/rotundu/Kconfig
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@ -27,6 +27,8 @@ config BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select USE_BLOBS select USE_BLOBS
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM1
if BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU if BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU

2
src/mainboard/opencellular/rotundu/acpi_tables.c
View File

@ -36,7 +36,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u1 = 0; gnvs->s5u1 = 0;
/* TPM Present */ /* TPM Present */
gnvs->tpmp = 0; gnvs->tpmp = 1;
/* Enable DPTF */ /* Enable DPTF */
gnvs->dpte = 0; gnvs->dpte = 0;

6
src/mainboard/opencellular/rotundu/variants/rotundu/devicetree.cb
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@ -75,7 +75,11 @@ chip soc/intel/fsp_baytrail
device pci 1e.3 on end # 8086 0F0A - HSUART 1 device pci 1e.3 on end # 8086 0F0A - HSUART 1
device pci 1e.4 off end # 8086 0F0C - HSUART 2 device pci 1e.4 off end # 8086 0F0C - HSUART 2
device pci 1e.5 off end # 8086 0F0E - SPI device pci 1e.5 off end # 8086 0F0E - SPI
device pci 1f.0 on end # 8086 0F1C - LPC bridge device pci 1f.0 on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end # 8086 0F1C - LPC bridge
device pci 1f.3 on end # 8086 0F12 - SMBus 0 device pci 1f.3 on end # 8086 0F12 - SMBus 0
end end
end end

6
src/mainboard/opencellular/rotundu/variants/supabrckv1/devicetree.cb
View File

@ -75,7 +75,11 @@ chip soc/intel/fsp_baytrail
device pci 1e.3 on end # 8086 0F0A - HSUART 1 device pci 1e.3 on end # 8086 0F0A - HSUART 1
device pci 1e.4 off end # 8086 0F0C - HSUART 2 device pci 1e.4 off end # 8086 0F0C - HSUART 2
device pci 1e.5 off end # 8086 0F0E - SPI device pci 1e.5 off end # 8086 0F0E - SPI
device pci 1f.0 on end # 8086 0F1C - LPC bridge device pci 1f.0 on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end # 8086 0F1C - LPC bridge
device pci 1f.3 on end # 8086 0F12 - SMBus 0 device pci 1f.3 on end # 8086 0F12 - SMBus 0
end end
end end