vendorcode: 64bit fixes for AMD CIMX SB800

Make SB800 code compile with x64 compiler

These fixes probably apply 1:1 to the other SB components
in that directory.

Change-Id: I9ff9f27dff5074d2faf41ebc14bfe50871d9c7f7
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/10573
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>

src/vendorcode/amd/cimx/sb800/DISPATCHER.c

@@ -183,11 +183,7 @@ LocateImage (
   ImagePtr = 0xffffffff - (IMAGE_ALIGN - 1);
 
   while ( ImagePtr >= (0xfffffff - (NUM_IMAGE_LOCATION * IMAGE_ALIGN - 1)) ) {
-#ifdef x64
-    12346789
-#else
-    Result = VerifyImage (Signature, (VOID*) ImagePtr);
-#endif
+    Result = VerifyImage (Signature, (VOID*)(UINTN)ImagePtr);
     if ( Result != NULL ) {
       return Result;
     }
@@ -244,7 +240,7 @@ saveConfigPointer (
   UINT8   i;
   UINT32   ddValue;
 
-  ddValue =  (UINT32) (UINTN)pConfig;
+  ddValue =  (UINT32) (UINTN)pConfig; // Needs to live below 4G
   dbReg = SB_ECMOS_REG08;
 
   for ( i = 0; i <= 3; i++ ) {

src/vendorcode/amd/cimx/sb800/Makefile.inc

@@ -22,6 +22,11 @@ CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb800
 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
 CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb800
 
+CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR)
+CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb800
+CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common
+CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb800
+
 romstage-y += ACPILIB.c
 romstage-y += AZALIA.c
 romstage-y += DISPATCHER.c

src/vendorcode/amd/cimx/sb800/SBMAIN.c

@@ -240,7 +240,7 @@ sbSmmAcpiOn (
  * @param[in] Data    Callback specific data.
  * @param[in] pConfig Southbridge configuration structure pointer.
  */
-UINTN
+UINT32
 CallBackToOEM (
   IN       UINT32 Func,
   IN       UINT32 Data,