amd/model_fxx: set CPU_ADDR_BITS to 40 on all K8 machines
Moves the K8 CPU_ADDR_BITS definition from socket to model. Previously socket_F was not setting CPU_ADDR_BITS correctly. Tested on Sun Ultra 40 M2 with two 2nd-gen Opterons w/ 2x4x2GiB DIMMs. Most if not all K8-based chips support 40-bit physical addresses, with possible exception of IA32-only K8-based Athlon XP-M chips. Probably irrelevant, unless your machine has enough memory (at least 60 to 64GiB before MMIO hoisting) to exceed the CPU_ADDR_BITS default of 36 from src/cpu/x86/Kconfig. Change-Id: I01a2a59fa902280171840c36ca2e631476d3d603 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/10963 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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@ -12,6 +12,10 @@ config CPU_AMD_MODEL_FXX
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select SUPPORT_CPU_UCODE_IN_CBFS
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select SUPPORT_CPU_UCODE_IN_CBFS
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if CPU_AMD_MODEL_FXX
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if CPU_AMD_MODEL_FXX
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config CPU_ADDR_BITS
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int
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default 40
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config UDELAY_IO
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config UDELAY_IO
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bool
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bool
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default n
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default n
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@ -8,10 +8,6 @@ config SOCKET_SPECIFIC_OPTIONS
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select CPU_AMD_MODEL_FXX
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select CPU_AMD_MODEL_FXX
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select X86_AMD_FIXED_MTRRS
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select X86_AMD_FIXED_MTRRS
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config CPU_ADDR_BITS
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int
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default 40
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config DCACHE_RAM_BASE
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config DCACHE_RAM_BASE
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hex
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hex
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default 0xc8000
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default 0xc8000
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@ -9,10 +9,6 @@ config SOCKET_SPECIFIC_OPTIONS
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select CPU_AMD_MODEL_FXX
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select CPU_AMD_MODEL_FXX
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select X86_AMD_FIXED_MTRRS
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select X86_AMD_FIXED_MTRRS
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config CPU_ADDR_BITS
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int
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default 40
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config DCACHE_RAM_BASE
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config DCACHE_RAM_BASE
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hex
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hex
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default 0xc8000
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default 0xc8000
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@ -19,10 +19,6 @@ config DIMM_SUPPORT
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hex
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hex
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default 0x0204
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default 0x0204
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config CPU_ADDR_BITS
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int
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default 40
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config DCACHE_RAM_BASE
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config DCACHE_RAM_BASE
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hex
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hex
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default 0xc8000
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default 0xc8000
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