From df63ff8b5582c66671758a639f929c9f63b229f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 30 May 2020 14:50:50 +0300 Subject: [PATCH] aopen/dxplplusu,intel/i82801dx: Select COMMON_FADT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move existing fadt.c file under southbridge. Change-Id: Ie2fdc715e4d1af347d25b51e83189f28cd9af014 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/41923 Reviewed-by: Patrick Rudolph Reviewed-by: HAOUAS Elyes Tested-by: build bot (Jenkins) --- src/southbridge/intel/i82801dx/Kconfig | 1 + src/southbridge/intel/i82801dx/Makefile.inc | 1 + .../intel/i82801dx}/fadt.c | 23 ++----------------- 3 files changed, 4 insertions(+), 21 deletions(-) rename src/{mainboard/aopen/dxplplusu => southbridge/intel/i82801dx}/fadt.c (81%) diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 5bea98c6bd..a0a2aceb22 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -3,6 +3,7 @@ config SOUTHBRIDGE_INTEL_I82801DX bool select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select COMMON_FADT select IOAPIC select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_SMBUS diff --git a/src/southbridge/intel/i82801dx/Makefile.inc b/src/southbridge/intel/i82801dx/Makefile.inc index d7b23717ca..030f7b4be2 100644 --- a/src/southbridge/intel/i82801dx/Makefile.inc +++ b/src/southbridge/intel/i82801dx/Makefile.inc @@ -4,6 +4,7 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82801DX),y) ramstage-y += i82801dx.c ramstage-y += ac97.c +ramstage-y += fadt.c ramstage-y += ide.c ramstage-y += lpc.c #ramstage-y += pci.c diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/southbridge/intel/i82801dx/fadt.c similarity index 81% rename from src/mainboard/aopen/dxplplusu/fadt.c rename to src/southbridge/intel/i82801dx/fadt.c index ad522c409b..b4974195b4 100644 --- a/src/mainboard/aopen/dxplplusu/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -17,24 +17,11 @@ #define S4_BIOS 0x77 #define GNVS_UPDATE 0xea -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { - acpi_header_t *header = &(fadt->header); u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = 0; /* PM_MOBILE; */ + fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->sci_int = 0x9; @@ -85,10 +72,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) fadt->reset_reg.addrh = 0x0; fadt->reset_value = 0; - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; @@ -145,6 +128,4 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *) fadt, header->length); }