From df771c1ee4329389968a76396ab5f43ae5478748 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sat, 21 Dec 2019 10:17:56 +0200
Subject: [PATCH] arch/x86: Remove more romcc leftovers
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The sections .rom.* were for romcc and no longer used.
Some romcc comments were left behind when guards were removed.

Change-Id: I060ad7af2f03c67946f9796e625c072b887280c1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
---
 src/arch/x86/bootblock_crt0.S | 3 ++-
 src/arch/x86/prologue.inc     | 6 ------
 src/cpu/intel/fit/fit.S       | 2 +-
 src/cpu/x86/16bit/entry16.inc | 1 +
 src/lib/program.ld            | 6 ------
 5 files changed, 4 insertions(+), 14 deletions(-)
 delete mode 100644 src/arch/x86/prologue.inc

diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
index 7291c47b92..9f45413e70 100644
--- a/src/arch/x86/bootblock_crt0.S
+++ b/src/arch/x86/bootblock_crt0.S
@@ -10,11 +10,12 @@
 
 #include <cpu/x86/cr.h>
 
+.section .text
+
 /*
  * Include the old code for reset vector and protected mode entry. That code has
  * withstood the test of time.
  */
-#include <arch/x86/prologue.inc>
 #include <cpu/x86/16bit/entry16.inc>
 #include <cpu/x86/16bit/reset16.inc>
 #include <cpu/x86/32bit/entry32.inc>
diff --git a/src/arch/x86/prologue.inc b/src/arch/x86/prologue.inc
deleted file mode 100644
index 6d2ae1e039..0000000000
--- a/src/arch/x86/prologue.inc
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <cpu/x86/post_code.h>
-
-.section ".rom.data", "a", @progbits
-.section ".rom.text", "ax", @progbits
diff --git a/src/cpu/intel/fit/fit.S b/src/cpu/intel/fit/fit.S
index 149d2d0384..3b7396c5ce 100644
--- a/src/cpu/intel/fit/fit.S
+++ b/src/cpu/intel/fit/fit.S
@@ -8,7 +8,7 @@ fit_pointer:
 .long 0
 .previous
 
-.section ".rom.data", "a", @progbits
+.section .text
 .align 16
 .global fit_table
 .global fit_table_end
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc
index c71acb0bff..13d12beb66 100644
--- a/src/cpu/x86/16bit/entry16.inc
+++ b/src/cpu/x86/16bit/entry16.inc
@@ -26,6 +26,7 @@
  */
 
 #include <arch/rom_segs.h>
+#include <cpu/x86/post_code.h>
 
 /* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
  * Startup IPI message without RAM.
diff --git a/src/lib/program.ld b/src/lib/program.ld
index 734f040fcd..17aa3db72c 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -13,12 +13,6 @@
 .text . : {
 	_program = .;
 	_text = .;
-	/*
-	 * The .rom.* sections are to acommodate x86 romstage. romcc as well
-	 * as the assembly files put their text and data in these sections.
-	 */
-	*(.rom.text);
-	*(.rom.data);
 	*(.text._start);
 	*(.text.stage_entry);
 #if (ENV_DECOMPRESSOR || ENV_BOOTBLOCK && \