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herobrine: update SPI-NOR config options 

Configuration support for 4k-byte addressing mode

BUG=b:215605946
TEST=Validated on qualcomm sc7280 developement board

Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Signed-off-by: T Michael Turney <quic_mturney@quicinc.com>
Change-Id: If82de6204446251dded1b83684677e6eb536e6fd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
This commit is contained in:
T Michael Turney 2022-01-20 11:41:59 -08:00 committed by Shelley Chen
parent d43e688ed2
commit df81e07c37
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/herobrine/Kconfig
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@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_QUALCOMM_SC7280 select SOC_QUALCOMM_SC7280
select SPI_FLASH select SPI_FLASH
select SPI_FLASH_WINBOND select SPI_FLASH_WINBOND
select SPI_FLASH_EXIT_4_BYTE_ADDR_MODE
select SPI_FLASH_MACRONIX select SPI_FLASH_MACRONIX
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_GOOGLE_PIGLIN select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_GOOGLE_PIGLIN