soc/amd/phoenix/include/data_fabric: add data fabric IO decode registers
PPRs #57019 Rev 3.05 and #57396 Rev 3.06 were used as a reference. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I769dc317115981391cf0f4e0b743c600407a6eb6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76958 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -8,6 +8,40 @@
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#define IOMS0_FABRIC_ID 0x13
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#define DF_IO_BASE0 DF_REG_ID(0, 0xd00)
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#define DF_IO_LIMIT0 DF_REG_ID(0, 0xd04)
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#define DF_IO_REG_COUNT 8
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#define DF_IO_REG_OFFSET(instance) ((instance) * 2 * sizeof(uint32_t))
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#define DF_IO_BASE(reg) (DF_IO_BASE0 + DF_IO_REG_OFFSET(reg))
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#define DF_IO_LIMIT(reg) (DF_IO_LIMIT0 + DF_IO_REG_OFFSET(reg))
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union df_io_base {
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struct {
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uint32_t re : 1; /* [ 0.. 0] */
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uint32_t we : 1; /* [ 1.. 1] */
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uint32_t : 3; /* [ 2.. 4] */
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uint32_t ie : 1; /* [ 5.. 5] */
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uint32_t : 10; /* [ 6..15] */
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uint32_t io_base : 13; /* [16..28] */
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uint32_t : 3; /* [29..31] */
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};
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uint32_t raw;
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};
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union df_io_limit {
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struct {
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uint32_t dst_fabric_id : 6; /* [ 0.. 5] */
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uint32_t : 10; /* [ 6..15] */
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uint32_t io_limit : 13; /* [16..28] */
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uint32_t : 3; /* [29..31] */
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};
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uint32_t raw;
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};
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#define DF_IO_ADDR_SHIFT 12
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#define DF_MMIO_BASE0 DF_REG_ID(0, 0xD80)
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#define DF_MMIO_LIMIT0 DF_REG_ID(0, 0xD84)
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#define DF_MMIO_SHIFT 16
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