nb/intel/nehalem: Fix smashed stack in romstage

Stack smashing was detected during raminit when not loading from MRC.
Adding CAR_GLOBAL to a struct inside raminit was suggested in
https://mail.coreboot.org/pipermail/coreboot/2018-May/086677.html in
order to fix the problem.
Adding CAR_GLOBAL to the ram timings variable solves the issue (adding
it to the ram_training or raminfo struct had no effect).
This is just a workaround and might need a proper fix in the future.

Tested on Lenovo X201i with 2+2 and 4+4 GB RAM.

Change-Id: I21b380db61be2aedc045201821d83e18e7d07ad1
Signed-off-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-on: https://review.coreboot.org/26388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Matthias Gazzari 2018-05-19 00:44:20 +02:00 committed by Martin Roth
parent 67403ed6e4
commit dfa51259ad
1 changed files with 5 additions and 1 deletions

View File

@ -44,6 +44,7 @@
#include <cpu/intel/speedstep.h>
#include <cpu/intel/turbo.h>
#include <mrc_cache.h>
#include <arch/early_variables.h>
#endif
#if !REAL
@ -282,6 +283,9 @@ struct raminfo {
const struct ram_training *cached_training;
};
/* Global allocation of timings_car */
timing_bounds_t timings_car[64] CAR_GLOBAL;
static void
write_500(struct raminfo *info, int channel, u32 val, u16 addr, int bits,
int flag);
@ -3128,7 +3132,7 @@ static void do_ram_training(struct raminfo *info)
u8 reg_178;
int niter;
timing_bounds_t timings[64];
timing_bounds_t *timings = timings_car;
int lane, rank, slot, channel;
u8 reg178_center;