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google/reef: Enable I2C2 for use in bootblock 

Enable I2C bus 2 for early init so it can be used by vboot for TPM
communication for verifying the memory init code.

BUG=chrome-os-partner:53336
BRANCH=none
TEST=build and boot on reef

Change-Id: Id4940ab01d8ccf288ab0a7a9a2f19867ed464e8d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16059
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2016-08-03 17:15:02 -07:00 committed by Aaron Durbin
parent 3731903646
commit dfb373541b
2 changed files with 6 additions and 0 deletions
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3
src/mainboard/google/reef/devicetree.cb
View File

@ -43,6 +43,9 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32" register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0" register "gpe0_dw3" = "PMC_GPE_SW_31_0"
# Enable I2C2 bus early for TPM access
register "i2c[2].early_init" = "1"
device domain 0 on device domain 0 on
device pci 00.0 on end # - Host Bridge device pci 00.0 on end # - Host Bridge
device pci 00.1 on end # - DPTF device pci 00.1 on end # - DPTF

3
src/mainboard/google/reef/gpio.h
View File

@ -344,6 +344,9 @@ static const struct pad_config gpio_table[] = {
/* GPIOs needed prior to ramstage. */ /* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = { static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPI(GPIO_75, UP_20K, DEEP), /* I2S1_BCLK -- PCH_WP */ PAD_CFG_GPI(GPIO_75, UP_20K, DEEP), /* I2S1_BCLK -- PCH_WP */
/* I2C2 - TPM */
PAD_CFG_NF(GPIO_128, UP_2K, DEEP, NF1), /* LPSS_I2C2_SDA */
PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */
}; };
/* /*