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nb/intel/sandybridge: Introduce memmap.h 

Move all memory map definitions into a separate header.

Tested with BUILD_TIMELESS=1, Lenovo ThinkPad X230 remains identical.

Change-Id: I7f2ff2a5cee8bf12e5dca74ff9f0b1a44e26cded
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45356
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-09-14 16:54:42 +02:00 committed by Patrick Georgi
parent 14efbb464e
commit dfca1697fc
2 changed files with 15 additions and 7 deletions
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14
src/northbridge/intel/sandybridge/memmap.h Normal file
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@ -0,0 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__
#define __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__
/* Northbridge BARs */
#define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */
#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
#define GFXVT_BASE 0xfed90000ULL
#define VTVC0_BASE 0xfed91000ULL
#endif /* __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__ */

8
src/northbridge/intel/sandybridge/sandybridge.h
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@ -20,13 +20,7 @@
#define IVB_STEP_K0 (BASE_REV_IVB + 5)
#define IVB_STEP_D0 (BASE_REV_IVB + 6)
/* Northbridge BARs */
#define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */
#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
#define GFXVT_BASE 0xfed90000ULL
#define VTVC0_BASE 0xfed91000ULL
#include "memmap.h"
/* Everything below this line is ignored in the DSDT */
#ifndef __ACPI__