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mb/google/zork/vilboz: Update register parameters for sx9324 tuning 

To update the sx9324 registers after RF team fine-tuned the parameters.

BUG=b:172397658
BRANCH=firmware-zork-13434.B
TEST=build coreboot and verify the sx9324 function

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: Ief85bc61952144a1d7a151100d89938517078ab4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51936
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frank Wu 2021-03-30 15:08:54 +08:00 committed by Patrick Georgi
parent 13145e5d18
commit dfd9a62a90
1 changed files with 17 additions and 9 deletions
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26
src/mainboard/google/zork/variants/vilboz/overridetree.cb
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@ -291,6 +291,10 @@ chip soc/amd/picasso
register "desc" = ""SAR Proximity Sensor"" register "desc" = ""SAR Proximity Sensor""
register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_40)" register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_40)"
register "uid" = "2" register "uid" = "2"
register "reg_irq_msk" = "0x67"
register "reg_irq_cfg0" = "0x00"
register "reg_irq_cfg1" = "0x80"
register "reg_irq_cfg2" = "0x00"
register "reg_gnrl_ctrl0" = "0x16" register "reg_gnrl_ctrl0" = "0x16"
register "reg_gnrl_ctrl1" = "0x21" register "reg_gnrl_ctrl1" = "0x21"
register "reg_afe_ctrl0" = "0x00" register "reg_afe_ctrl0" = "0x00"
@ -302,14 +306,18 @@ chip soc/amd/picasso
register "reg_afe_ctrl6" = "0x00" register "reg_afe_ctrl6" = "0x00"
register "reg_afe_ctrl7" = "0x07" register "reg_afe_ctrl7" = "0x07"
register "reg_afe_ctrl8" = "0x12" register "reg_afe_ctrl8" = "0x12"
register "reg_afe_ctrl9" = "0x0f" register "reg_afe_ctrl9" = "0x0b"
register "reg_prox_ctrl0" = "0x12" register "reg_afe_ph0" = "0x29"
register "reg_afe_ph1" = "0x26"
register "reg_afe_ph2" = "0x1a"
register "reg_afe_ph3" = "0x16"
register "reg_prox_ctrl0" = "0x10"
register "reg_prox_ctrl1" = "0x12" register "reg_prox_ctrl1" = "0x12"
register "reg_prox_ctrl2" = "0x90" register "reg_prox_ctrl2" = "0x20"
register "reg_prox_ctrl3" = "0x60" register "reg_prox_ctrl3" = "0x20"
register "reg_prox_ctrl4" = "0x0c" register "reg_prox_ctrl4" = "0x0c"
register "reg_prox_ctrl5" = "0x12" register "reg_prox_ctrl5" = "0x00"
register "reg_prox_ctrl6" = "0x3c" register "reg_prox_ctrl6" = "0x18"
register "reg_prox_ctrl7" = "0x58" register "reg_prox_ctrl7" = "0x58"
register "reg_adv_ctrl0" = "0x00" register "reg_adv_ctrl0" = "0x00"
register "reg_adv_ctrl1" = "0x00" register "reg_adv_ctrl1" = "0x00"
@ -321,13 +329,13 @@ chip soc/amd/picasso
register "reg_adv_ctrl7" = "0x00" register "reg_adv_ctrl7" = "0x00"
register "reg_adv_ctrl8" = "0x00" register "reg_adv_ctrl8" = "0x00"
register "reg_adv_ctrl9" = "0x00" register "reg_adv_ctrl9" = "0x00"
register "reg_adv_ctrl10" = "0x5c" register "reg_adv_ctrl10" = "0x0c"
register "reg_adv_ctrl11" = "0x52" register "reg_adv_ctrl11" = "0x00"
register "reg_adv_ctrl12" = "0xb5" register "reg_adv_ctrl12" = "0xb5"
register "reg_adv_ctrl13" = "0x00" register "reg_adv_ctrl13" = "0x00"
register "reg_adv_ctrl14" = "0x80" register "reg_adv_ctrl14" = "0x80"
register "reg_adv_ctrl15" = "0x0c" register "reg_adv_ctrl15" = "0x0c"
register "reg_adv_ctrl16" = "0x38" register "reg_adv_ctrl16" = "0x08"
register "reg_adv_ctrl17" = "0x56" register "reg_adv_ctrl17" = "0x56"
register "reg_adv_ctrl18" = "0x33" register "reg_adv_ctrl18" = "0x33"
register "reg_adv_ctrl19" = "0xf0" register "reg_adv_ctrl19" = "0xf0"