ACPI: Allocate GNVS early in ramstage

We need this to happen prior to SMM module loader. If
there is some debugging output it's better they do not
appear in the middle of CPU bringup.

Change-Id: I45b4b5c0c5bf8bee258a465d1e364bfe98190e44
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48697
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/acpi/chromeos-gnvs.c

@@ -4,9 +4,18 @@
 #include <ec/google/chromeec/ec.h>
 #include <vendorcode/google/chromeos/gnvs.h>
 
+/* Remove once implemented on platform code. */
+__weak void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
+{
+	return NULL;
+}
+
 void gnvs_assign_chromeos(void)
 {
-	chromeos_acpi_t *gnvs_chromeos = gnvs_chromeos_ptr();
+	chromeos_acpi_t *gnvs_chromeos = gnvs_chromeos_ptr(acpi_get_gnvs());
+	if (!gnvs_chromeos)
+		return;
+
 	chromeos_init_chromeos_acpi(gnvs_chromeos);
 
 	/* EC can override to ECFW_RW. */

src/acpi/gnvs.c

@@ -24,11 +24,22 @@ void *acpi_get_gnvs(void)
 
 static void gnvs_assign_cbmc(void)
 {
-	uint32_t *gnvs_cbmc = gnvs_cbmc_ptr();
+	uint32_t *gnvs_cbmc = gnvs_cbmc_ptr(gnvs);
 	if (gnvs_cbmc)
 		*gnvs_cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE);
 }
 
+/* Platforms that implement GNVS will need to implement these. */
+__weak size_t gnvs_size_of_array(void)
+{
+	return 0;
+}
+
+__weak uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs_)
+{
+	return NULL;
+}
+
 void *gnvs_get_or_create(void)
 {
 	size_t gnvs_size;
@@ -41,10 +52,12 @@ void *gnvs_get_or_create(void)
 		return gnvs;
 
 	gnvs_size = gnvs_size_of_array();
+	if (!gnvs_size)
+		return NULL;
 
 	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, gnvs_size);
 	if (!gnvs)
-		return gnvs;
+		return NULL;
 
 	memset(gnvs, 0, gnvs_size);
 
@@ -59,11 +72,10 @@ void *gnvs_get_or_create(void)
 
 void acpi_inject_nvsa(void)
 {
-	uintptr_t gnvs_address = (uintptr_t)acpi_get_gnvs();
+	if (!gnvs)
-	if (!gnvs_address)
 		return;
 
 	acpigen_write_scope("\\");
-	acpigen_write_name_dword("NVSA", gnvs_address);
+	acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
 	acpigen_pop_len();
 }

src/include/acpi/acpi_gnvs.h

@@ -12,9 +12,10 @@ void acpi_inject_nvsa(void);
 void gnvs_assign_chromeos(void);
 
 /* Platform code must implement these. */
+struct global_nvs;
 size_t gnvs_size_of_array(void);
-uint32_t *gnvs_cbmc_ptr(void);
+uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs);
-void *gnvs_chromeos_ptr(void);
+void *gnvs_chromeos_ptr(struct global_nvs *gnvs);
 
 /*
  * Creates acpi gnvs and adds it to the DSDT table.
@@ -28,7 +29,6 @@ void southbridge_inject_dsdt(const struct device *device);
  * Defined as weak in common acpi as gnvs structure definition is
  * chipset specific.
  */
-struct global_nvs;
 
 void acpi_create_gnvs(struct global_nvs *gnvs);
 void acpi_init_gnvs(struct global_nvs *gnvs);

src/lib/hardwaremain.c

@@ -7,6 +7,7 @@
 
 #include <adainit.h>
 #include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
 #include <arch/exception.h>
 #include <bootstate.h>
 #include <console/console.h>
@@ -447,6 +448,10 @@ void main(void)
 	acpi_is_wakeup_s3();
 	threads_initialize();
 
+	/* Initialise GNVS early. */
+	if (CONFIG(HAVE_ACPI_TABLES))
+		gnvs_get_or_create();
+
 	/* Schedule the static boot state entries. */
 	boot_state_schedule_static_entries();