mb/google/brya/variant/taeko: Update devicetree settings

Based on schematic and gpio table of taeko, generate overridetree.cb
settings for taeko.

BUG=b:195494281
TEST=FW_NAME=taeko emerge-brya coreboot chromeos-bootimage

Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: I96aaf48284a226edc39115f870bf0f3dd83ab8b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56802
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Joey Peng 2021-08-04 17:44:18 +08:00 committed by Tim Wawrzynczak
parent 55f5410fcd
commit e026035391
1 changed files with 277 additions and 2 deletions

View File

@ -1,6 +1,281 @@
chip soc/intel/alderlake
register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # DB USB2_C1
register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN
device domain 0 on
end
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
#| GSPI1 | Fingerprint MCU |
#| I2C0 | Audio |
#| I2C1 | Touchscreen |
#| I2C2 | HPS |
#| I2C3 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| I2C5 | Trackpad |
#+-------------------+---------------------------+
register "common_soc_config.chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
register "common_soc_config" = "{
.i2c[0] = {
.speed = I2C_SPEED_FAST,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
.early_init = 1,
.speed = I2C_SPEED_FAST,
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
},
}"
# I2C Port Config
register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci,
[PchSerialIoIndexI2C2] = PchSerialIoPci,
[PchSerialIoIndexI2C3] = PchSerialIoPci,
[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
device domain 0 on
device ref tbt_pcie_rp0 off end
device ref tbt_pcie_rp1 off end
device ref tbt_pcie_rp2 off end
device ref i2c0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Headset Codec""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_count" = "1"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on
end
end
end
device ref i2c1 on
chip drivers/i2c/hid
register "generic.hid" = ""GDIX0000""
register "generic.desc" = ""Goodix Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
# Parameter T5 >= 180ms
register "generic.reset_delay_ms" = "180"
# Parameter T2 >= 1ms
register "generic.reset_off_delay_ms" = "3"
register "generic.enable_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
# Parameter T1 >= 20ms
register "generic.enable_delay_ms" = "20"
register "generic.stop_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
# Parameter T4 >= 1ms
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end
chip drivers/i2c/generic
register "hid" = ""ELAN0001""
register "desc" = ""ELAN Touchscreen""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
register "probed" = "1"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
register "reset_delay_ms" = "20"
register "enable_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
device i2c 10 on end
end
end
device ref i2c5 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
register "wake" = "GPE0_DW2_15"
register "probed" = "1"
device i2c 15 on end
end
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
register "generic.desc" = ""Synaptics Touchpad""
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
register "generic.wake" = "GPE0_DW2_15"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
end
device ref hda on
chip drivers/generic/max98357a
register "hid" = ""MX98357A""
register "sdmode_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
register "sdmode_delay" = "5"
device generic 0 on end
end
chip drivers/intel/soundwire
device generic 0 on
chip drivers/soundwire/alc5682
# SoundWire Link 0 ID 1
register "desc" = ""Headset Codec""
device generic 0.1 on end
end
chip drivers/soundwire/max98373
# SoundWire Link 2 ID 3
register "desc" = ""Left Speaker Amp""
device generic 2.3 on end
end
chip drivers/soundwire/max98373
# SoundWire Link 2 ID 7
register "desc" = ""Right Speaker Amp""
device generic 2.7 on end
end
end
end
end
device ref pcie_rp5 on
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
register "srcclk_pin" = "2"
device generic 0 on end
end
register "pch_pcie_rp[PCH_RP(5)]" = "{
.clk_src = 2,
.clk_req = 2,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
end
device ref pcie_rp6 off end
device ref pcie_rp8 on
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
register "srcclk_pin" = "3"
device generic 0 on end
end
end
device ref pcie_rp9 on
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)"
register "srcclk_pin" = "1"
device generic 0 on end
end
end
device ref gspi1 on
chip drivers/spi/acpi
register "name" = ""CRFP""
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
register "wake" = "GPE0_DW2_15"
device spi 0 on end
end # FPMCU
end
device ref pch_espi on
chip ec/google/chromeec
use conn0 as mux_conn[0]
use conn1 as mux_conn[1]
device pnp 0c09.0 on end
end
end
device ref pmc hidden
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
register "usb2_port_number" = "1"
register "usb3_port_number" = "1"
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
register "usb2_port_number" = "3"
register "usb3_port_number" = "3"
device generic 2 alias conn1 on end
end
end
end
end
device ref tcss_xhci on
chip drivers/usb/acpi
device ref tcss_root_hub on
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref tcss_usb3_port3 on end
end
end
end
end
device ref xhci on
chip drivers/usb/acpi
device ref xhci_root_hub on
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Camera""
register "type" = "UPC_TYPE_INTERNAL"
device ref usb2_port6 on
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(4, 1)"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
device ref usb2_port10 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(4, 1)"
device ref usb3_port1 on end
end
end
end
end
end
end