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soc/intel/baytrail: Add MRC SMBus workaround 

- The Bay Trail MRC fails to read the SPDs from SMBus.
- Instead the SPDs are read into a buffer and the buffer is passed to
	the MRC.

Change-Id: I7f560d950cb4e4d118f3ee17e6e19e14cd0cc193
Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44092
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mate Kukri 2020-08-01 11:45:13 +02:00 committed by Angel Pons
parent ac01106743
commit e053493717
1 changed files with 17 additions and 1 deletions
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18
src/soc/intel/baytrail/romstage/raminit.c
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@ -115,11 +115,15 @@ static void print_dram_info(void *dram_data)
populate_smbios_tables(dram_data, speed, num_channels);
}
#define SPD_SIZE 256
static u8 spd_buf[NUM_CHANNELS][SPD_SIZE];
void raminit(struct mrc_params *mp, int prev_sleep_state)
{
int ret;
mrc_wrapper_entry_t mrc_entry;
struct region_device rdev;
size_t i;
/* Fill in default entries. */
mp->version = MRC_PARAMS_VER;
@ -158,8 +162,20 @@ void raminit(struct mrc_params *mp, int prev_sleep_state)
*/
mrc_entry = (void *)(uintptr_t)CONFIG_MRC_BIN_ADDRESS;
if (mp->mainboard.dram_info_location == DRAM_INFO_SPD_SMBUS)
if (mp->mainboard.dram_info_location == DRAM_INFO_SPD_SMBUS) {
/* Workaround for broken SMBus support in the MRC */
enable_smbus();
mp->mainboard.dram_info_location = DRAM_INFO_SPD_MEM;
for (i = 0; i < NUM_CHANNELS; ++i) {
if (mp->mainboard.spd_addrs[i]) {
i2c_eeprom_read(mp->mainboard.spd_addrs[i],
0, SPD_SIZE, spd_buf[i]);
/* NOTE: MRC looks for Channel 1 SPD at array
index 1 */
mp->mainboard.dram_data[i] = spd_buf;
}
}
}
ret = mrc_entry(mp);