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soc/intel/common/blk/crashlog: Drop some new lines 

Remove unnecessary new lines in crashlog code.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I0920f563d6fdf9414eab86796cedcac83173dba3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60622
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik 2022-01-01 15:56:42 +05:30
parent f424c8b80f
commit e065db0dc2
1 changed files with 0 additions and 35 deletions
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35
src/soc/intel/common/block/crashlog/crashlog.c
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@ -6,82 +6,67 @@
#include <intelblocks/crashlog.h> #include <intelblocks/crashlog.h>
#include <string.h> #include <string.h>
int __weak cl_get_cpu_record_size(void) int __weak cl_get_cpu_record_size(void)
{ {
return 0; return 0;
} }
int __weak cl_get_pmc_record_size(void) int __weak cl_get_pmc_record_size(void)
{ {
return 0; return 0;
} }
u32 __weak cl_get_cpu_bar_addr(void) u32 __weak cl_get_cpu_bar_addr(void)
{ {
return 0; return 0;
} }
u32 __weak cl_get_cpu_tmp_bar(void) u32 __weak cl_get_cpu_tmp_bar(void)
{ {
return 0; return 0;
} }
u32 __weak cl_get_cpu_mb_int_addr(void) u32 __weak cl_get_cpu_mb_int_addr(void)
{ {
return 0; return 0;
} }
int __weak cl_get_total_data_size(void) int __weak cl_get_total_data_size(void)
{ {
return cl_get_cpu_record_size() + cl_get_pmc_record_size(); return cl_get_cpu_record_size() + cl_get_pmc_record_size();
} }
bool __weak cl_pmc_sram_has_mmio_access(void) bool __weak cl_pmc_sram_has_mmio_access(void)
{ {
return false; return false;
} }
bool __weak cpu_crashlog_support(void) bool __weak cpu_crashlog_support(void)
{ {
return false; return false;
} }
bool __weak pmc_crashlog_support(void) bool __weak pmc_crashlog_support(void)
{ {
return false; return false;
} }
bool __weak cl_cpu_data_present(void) bool __weak cl_cpu_data_present(void)
{ {
return false; return false;
} }
bool __weak cl_pmc_data_present(void) bool __weak cl_pmc_data_present(void)
{ {
return false; return false;
} }
__weak void reset_discovery_buffers(void) {} __weak void reset_discovery_buffers(void) {}
__weak void update_new_pmc_crashlog_size(u32 *pmc_crash_size) {} __weak void update_new_pmc_crashlog_size(u32 *pmc_crash_size) {}
__weak void update_new_cpu_crashlog_size(u32 *cpu_crash_size) {} __weak void update_new_cpu_crashlog_size(u32 *cpu_crash_size) {}
pmc_ipc_discovery_buf_t __weak cl_get_pmc_discovery_buf(void) pmc_ipc_discovery_buf_t __weak cl_get_pmc_discovery_buf(void)
{ {
pmc_ipc_discovery_buf_t discov_buf; pmc_ipc_discovery_buf_t discov_buf;
@ -89,7 +74,6 @@ pmc_ipc_discovery_buf_t __weak cl_get_pmc_discovery_buf(void)
return discov_buf; return discov_buf;
} }
pmc_crashlog_desc_table_t __weak cl_get_pmc_descriptor_table(void) pmc_crashlog_desc_table_t __weak cl_get_pmc_descriptor_table(void)
{ {
pmc_crashlog_desc_table_t desc_tab; pmc_crashlog_desc_table_t desc_tab;
@ -97,7 +81,6 @@ pmc_crashlog_desc_table_t __weak cl_get_pmc_descriptor_table(void)
return desc_tab; return desc_tab;
} }
cpu_crashlog_discovery_table_t __weak cl_get_cpu_discovery_table(void) cpu_crashlog_discovery_table_t __weak cl_get_cpu_discovery_table(void)
{ {
cpu_crashlog_discovery_table_t cpu_disc_tab; cpu_crashlog_discovery_table_t cpu_disc_tab;
@ -105,7 +88,6 @@ cpu_crashlog_discovery_table_t __weak cl_get_cpu_discovery_table(void)
return cpu_disc_tab; return cpu_disc_tab;
} }
int cpu_cl_poll_mailbox_ready(u32 cl_mailbox_addr) int cpu_cl_poll_mailbox_ready(u32 cl_mailbox_addr)
{ {
cpu_crashlog_mailbox_t cl_mailbox_interface; cpu_crashlog_mailbox_t cl_mailbox_interface;
@ -127,7 +109,6 @@ int cpu_cl_poll_mailbox_ready(u32 cl_mailbox_addr)
return 1; return 1;
} }
int cpu_cl_mailbox_cmd(u8 cmd, u8 param) int cpu_cl_mailbox_cmd(u8 cmd, u8 param)
{ {
cpu_crashlog_mailbox_t cl_mailbox_intf; cpu_crashlog_mailbox_t cl_mailbox_intf;
@ -149,13 +130,11 @@ int cpu_cl_mailbox_cmd(u8 cmd, u8 param)
return 1; return 1;
} }
int cpu_cl_clear_data(void) int cpu_cl_clear_data(void)
{ {
return cpu_cl_mailbox_cmd(CPU_CRASHLOG_CMD_CLEAR, 0); return cpu_cl_mailbox_cmd(CPU_CRASHLOG_CMD_CLEAR, 0);
} }
int pmc_cl_gen_descriptor_table(u32 desc_table_addr, int pmc_cl_gen_descriptor_table(u32 desc_table_addr,
pmc_crashlog_desc_table_t *descriptor_table) pmc_crashlog_desc_table_t *descriptor_table)
{ {
@ -178,19 +157,16 @@ int pmc_cl_gen_descriptor_table(u32 desc_table_addr,
return total_data_size; return total_data_size;
} }
bool __weak pmc_cl_discovery(void) bool __weak pmc_cl_discovery(void)
{ {
return false; return false;
} }
bool __weak cpu_cl_discovery(void) bool __weak cpu_cl_discovery(void)
{ {
return false; return false;
} }
int cl_pmc_re_arm_after_reset(void) int cl_pmc_re_arm_after_reset(void)
{ {
@ -213,7 +189,6 @@ int cl_pmc_re_arm_after_reset(void)
return r; return r;
} }
/* Sends PMC IPC to clear CrashLog from PMC SSRAM area */ /* Sends PMC IPC to clear CrashLog from PMC SSRAM area */
int cl_pmc_clear(void) int cl_pmc_clear(void)
{ {
@ -236,12 +211,10 @@ int cl_pmc_clear(void)
return r; return r;
} }
/* /*
* Sends PMC IPC to populate CrashLog on all reboot. * Sends PMC IPC to populate CrashLog on all reboot.
* The SSRAM area will be cleared on G3 by PMC automatically * The SSRAM area will be cleared on G3 by PMC automatically
*/ */
int cl_pmc_en_gen_on_all_reboot(void) int cl_pmc_en_gen_on_all_reboot(void)
{ {
const struct pmc_ipc_buffer req = { 0 }; const struct pmc_ipc_buffer req = { 0 };
@ -263,7 +236,6 @@ int cl_pmc_en_gen_on_all_reboot(void)
return r; return r;
} }
bool discover_crashlog(void) bool discover_crashlog(void)
{ {
bool cpu_cl_discovered = false, pmc_cl_discovered = false; bool cpu_cl_discovered = false, pmc_cl_discovered = false;
@ -279,7 +251,6 @@ bool discover_crashlog(void)
return (cpu_cl_discovered || pmc_cl_discovered); return (cpu_cl_discovered || pmc_cl_discovered);
} }
bool cl_copy_data_from_sram(u32 src_bar, bool cl_copy_data_from_sram(u32 src_bar,
u32 offset, u32 offset,
u32 size, u32 size,
@ -320,7 +291,6 @@ bool cl_copy_data_from_sram(u32 src_bar,
return true; return true;
} }
void cl_get_pmc_sram_data(void) void cl_get_pmc_sram_data(void)
{ {
u32 *dest = NULL; u32 *dest = NULL;
@ -413,7 +383,6 @@ pmc_send_re_arm_after_reset:
} }
void cl_get_cpu_sram_data(void) void cl_get_cpu_sram_data(void)
{ {
u32 tmp_bar_addr = 0; u32 tmp_bar_addr = 0;
@ -471,10 +440,8 @@ void cl_get_cpu_sram_data(void)
/* clear telemetry SRAM region */ /* clear telemetry SRAM region */
cpu_cl_clear_data(); cpu_cl_clear_data();
} }
void collect_pmc_and_cpu_crashlog_from_srams(void) void collect_pmc_and_cpu_crashlog_from_srams(void)
{ {
if (pmc_crashlog_support() && cl_pmc_data_present() if (pmc_crashlog_support() && cl_pmc_data_present()
@ -499,7 +466,6 @@ void collect_pmc_and_cpu_crashlog_from_srams(void)
} }
} }
bool cl_fill_cpu_records(void *cl_record) bool cl_fill_cpu_records(void *cl_record)
{ {
void *cl_src_addr = NULL; void *cl_src_addr = NULL;
@ -518,7 +484,6 @@ bool cl_fill_cpu_records(void *cl_record)
return true; return true;
} }
bool cl_fill_pmc_records(void *cl_record) bool cl_fill_pmc_records(void *cl_record)
{ {
void *cl_src_addr = NULL; void *cl_src_addr = NULL;