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mb/amd/chausie/ec.c: Clean up defines 

Use the BIT() macro instead of reinventing the wheel.

TEST=timeless builds are identical

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I873013feebd30c86290dda692c7b137d5f3c4729
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Fred Reitberger 2022-09-07 09:28:12 -04:00 committed by Felix Held
parent d579d80d75
commit e078b058e3
1 changed files with 11 additions and 11 deletions
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22
src/mainboard/amd/chausie/ec.c
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@ -7,27 +7,27 @@
#define CHAUSIE_EC_DATA 0x662
#define EC_GPIO_3_ADDR 0xA3
#define EC_GPIO_LOM_RESET_AUX (1 << 1)
#define EC_GPIO_LOM_RESET_AUX BIT(1)
#define EC_GPIO_7_ADDR 0xA7
#define EC_GPIO_DT_PWREN (1 << 2)
#define EC_GPIO_WWAN_MODULE_RST (1 << 5)
#define EC_GPIO_DT_PWREN BIT(2)
#define EC_GPIO_WWAN_MODULE_RST BIT(5)
#define EC_GPIO_8_ADDR 0xA8
#define EC_GPIO_SMBUS0_EN (1 << 0)
#define EC_GPIO_SMBUS0_EN BIT(0)
#define EC_GPIO_A_ADDR 0xAA
#define EC_GPIO_WWAN_PWREN (1 << 3)
#define EC_GPIO_M2_SSD0_PWREN (1 << 6)
#define EC_GPIO_LOM_PWREN (1 << 7)
#define EC_GPIO_WWAN_PWREN BIT(3)
#define EC_GPIO_M2_SSD0_PWREN BIT(6)
#define EC_GPIO_LOM_PWREN BIT(7)
#define EC_GPIO_C_ADDR 0xAC
#define EC_GPIO_DT_N_WLAN_SW (1 << 1)
#define EC_GPIO_MP2_SEL (1 << 2)
#define EC_GPIO_WWAN_N_LOM_SW (1 << 3)
#define EC_GPIO_DT_N_WLAN_SW BIT(1)
#define EC_GPIO_MP2_SEL BIT(2)
#define EC_GPIO_WWAN_N_LOM_SW BIT(3)
#define EC_SW02_ADDR 0xB7
#define EC_SW02_MS (1 << 7)
#define EC_SW02_MS BIT(7)
static void configure_ec_gpio(void)
{