mb/intel/kblrvp: Rework Kconfig

Rework Kconfig file that each variant has its own config option with
their specific selects / configuration and move common selects to
`BOARD_INTEL_KBLRVP_COMMON`, which is used as base for each
variant.

Built each variant with `BUILD_TIMELESS=1` and all generated
coreboot.rom files remain identical. Excluded the .config file by
disabling `INCLUDE_CONFIG_FILE` to make this reproducible.

Change-Id: I2a9c12a15c098fcb64c006a707c94a1aed93d73a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56219
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Felix Singer 2021-07-12 18:18:23 +02:00
parent e4047354ec
commit e07f9ccc11
2 changed files with 28 additions and 11 deletions

View File

@ -1,21 +1,35 @@
if BOARD_INTEL_KBLRVP3 || BOARD_INTEL_KBLRVP7 || BOARD_INTEL_KBLRVP8 \
|| BOARD_INTEL_KBLRVP11
config BOARD_SPECIFIC_OPTIONS
def_bool y
config BOARD_INTEL_KBLRVP_COMMON
def_bool n
select BOARD_ROMSIZE_KB_16384
select EC_ACPI
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select SOC_INTEL_COMMON_BLOCK_HDA_VERB if !BOARD_INTEL_KBLRVP8
select SOC_INTEL_KABYLAKE
select SKYLAKE_SOC_PCH_H if BOARD_INTEL_KBLRVP8 || BOARD_INTEL_KBLRVP11
select MAINBOARD_HAS_CHROMEOS
select HAVE_SPD_IN_CBFS
select MAINBOARD_HAS_LPC_TPM
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_USES_IFD_GBE_REGION if BOARD_INTEL_KBLRVP8
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_LPC_TPM
select SOC_INTEL_KABYLAKE
config BOARD_INTEL_KBLRVP3
select BOARD_INTEL_KBLRVP_COMMON
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
config BOARD_INTEL_KBLRVP7
select BOARD_INTEL_KBLRVP_COMMON
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
config BOARD_INTEL_KBLRVP8
select BOARD_INTEL_KBLRVP_COMMON
select MAINBOARD_USES_IFD_GBE_REGION
select SKYLAKE_SOC_PCH_H
config BOARD_INTEL_KBLRVP11
select BOARD_INTEL_KBLRVP_COMMON
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SKYLAKE_SOC_PCH_H
if BOARD_INTEL_KBLRVP_COMMON
config VBOOT
select VBOOT_LID_SWITCH

View File

@ -1,8 +1,11 @@
config BOARD_INTEL_KBLRVP3
bool "Kabylake LPDDR3 RVP3"
config BOARD_INTEL_KBLRVP7
bool "Kabylake DDR3L RVP7"
config BOARD_INTEL_KBLRVP8
bool "Kabylake DDR4 RVP8"
config BOARD_INTEL_KBLRVP11
bool "Kabylake DDR4 RVP11"