device,drivers/: Drop some __SIMPLE_DEVICE__ use
The simple PCI config accessors are always available under names pci_s_[read|write]_configX. Change-Id: Ic1b67695b7f72e4f1fa29e2d56698276b15024e1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -12,10 +12,6 @@
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* GNU General Public License for more details.
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*/
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#if ENV_RAMSTAGE
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#define __SIMPLE_DEVICE__ 1
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#endif
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#include <arch/early_variables.h>
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#include <commonlib/sdhci.h>
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#include <device/pci.h>
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@ -54,11 +50,11 @@ struct sd_mmc_ctrlr *new_mem_sdhci_controller(void *ioaddr)
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return car_get_var_ptr(&sdhci_ctrlr.sd_mmc_ctrlr);
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}
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struct sd_mmc_ctrlr *new_pci_sdhci_controller(uint32_t dev)
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struct sd_mmc_ctrlr *new_pci_sdhci_controller(pci_devfn_t dev)
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{
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uint32_t addr;
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addr = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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addr = pci_s_read_config32(dev, PCI_BASE_ADDRESS_0);
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if (addr == ((uint32_t)~0)) {
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sdhc_error("Error: PCI SDHCI not found\n");
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return NULL;
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@ -11,8 +11,6 @@
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* GNU General Public License for more details.
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*/
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#define __SIMPLE_DEVICE__
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#include <stdint.h>
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#include <console/console.h>
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#include <device/pci.h>
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@ -13,8 +13,6 @@
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* GNU General Public License for more details.
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*/
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#define __SIMPLE_DEVICE__
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#include <stdint.h>
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#include <stddef.h>
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#include <device/pci_ops.h>
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@ -31,7 +29,7 @@ int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base)
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{
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pci_devfn_t device = PCI_DEV(bus, dev, 0);
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u32 id = pci_read_config32(device, PCI_VENDOR_ID);
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u32 id = pci_s_read_config32(device, PCI_VENDOR_ID);
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switch (id) {
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case 0xc1181415: /* e.g. Startech PEX1S1PMINI function 0 */
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/* On this device function 0 is the parallel port, and
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@ -39,7 +37,7 @@ int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base)
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* the UART.
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*/
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device = PCI_DEV(bus, dev, 3);
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id = pci_read_config32(device, PCI_VENDOR_ID);
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id = pci_s_read_config32(device, PCI_VENDOR_ID);
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if (id != 0xc11b1415)
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return -1;
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break;
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@ -56,12 +54,12 @@ int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base)
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return -1;
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/* Setup base address on device */
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pci_write_config32(device, PCI_BASE_ADDRESS_0, mmio_base);
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pci_s_write_config32(device, PCI_BASE_ADDRESS_0, mmio_base);
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/* Enable memory on device */
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u16 reg16 = pci_read_config16(device, PCI_COMMAND);
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u16 reg16 = pci_s_read_config16(device, PCI_COMMAND);
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reg16 |= PCI_COMMAND_MEMORY;
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pci_write_config16(device, PCI_COMMAND, reg16);
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pci_s_write_config16(device, PCI_COMMAND, reg16);
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car_set_var(oxpcie_present, 1);
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return 0;
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