mb/amd/majolica: Add chromeos support
This change enables vboot support. To use it add CHROMEOS=y to your config. TEST=Boot majolica and see verstage run, and then see depthcharge load. coreboot-4.13-1730-g881092709a5e Fri Feb 5 23:50:28 UTC 2021 verstage starting (log level: 8)... Phase 1 FMAP: area GBB found @ 805000 (458752 bytes) VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0 Phase 2 Phase 3 FMAP: area GBB found @ 805000 (458752 bytes) FMAP: area VBLOCK_A found @ 30000 (8192 bytes) FMAP: area VBLOCK_A found @ 30000 (8192 bytes) VB2:vb2_verify_keyblock() Checking keyblock signature... VB2:vb2_verify_digest() HW RSA forbidden, using SW VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW FMAP: area VBLOCK_A found @ 30000 (8192 bytes) FMAP: area VBLOCK_A found @ 30000 (8192 bytes) VB2:vb2_verify_fw_preamble() Verifying preamble. VB2:vb2_verify_digest() HW RSA forbidden, using SW VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW Phase 4 FMAP: area FW_MAIN_A found @ 32000 (3137280 bytes) VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW VB2:vb2_verify_digest() HW RSA forbidden, using SW VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW Saving secdata firmware Saving secdata kernel Saving nvdata Slot A is selected FMAP: area FW_MAIN_A found @ 32000 (3137280 bytes) CBFS: mcache @0x02017000 built for 9 files, used 0x1ec of 0x800 bytes CBFS: Found 'fallback/romstage' @0x0 size 0x753c in mcache @0x02017000 BS: verstage times (exec / console): total (unknown) / 116 ms coreboot-4.13-1730-g881092709a5e Fri Feb 5 23:50:28 UTC 2021 romstage starting (log level: 8)... Family_Model: 00a50f00 FMAP: area FW_MAIN_A found @ 32000 (3137280 bytes) CBFS: Found 'fspm.bin' @0x15440 size 0x2257d in mcache @0x02017138 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I43f0c6e33649332057f41f8813a86571b06032f1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -7,6 +7,7 @@ config BOARD_SPECIFIC_OPTIONS
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select BOARD_ROMSIZE_KB_16384
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select SOC_AMD_CEZANNE
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select AMD_SOC_CONSOLE_UART
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select MAINBOARD_HAS_CHROMEOS
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config FMDFILE
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string
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@ -21,6 +22,7 @@ config MAINBOARD_PART_NUMBER
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config AMD_FWM_POSITION_INDEX
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int
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default 3 if CHROMEOS
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default 4
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help
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TODO: might need to be adapted for better placement of files in cbfs
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@ -37,4 +39,17 @@ config MAJOLICA_MCHP_FW_FILE
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The EC firmware blob is usually the first 128kByte of the stock
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firmware image.
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config VBOOT
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select VBOOT_NO_BOARD_SUPPORT
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select VBOOT_SEPARATE_VERSTAGE
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select VBOOT_STARTS_IN_BOOTBLOCK
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config VBOOT_VBNV_OFFSET
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hex
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default 0x2A
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config CHROMEOS
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# Use default libpayload config
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select LP_DEFCONFIG_OVERRIDE if PAYLOAD_DEPTHCHARGE
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endif # BOARD_AMD_MAJOLICA
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@ -1,14 +1,34 @@
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FLASH@0xFF000000 16M {
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BIOS {
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SI_BIOS {
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EC 128K
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RW_MRC_CACHE 64K
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RW_LEGACY(CBFS) 4K
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FW_MAIN_A(CBFS) 1M
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VBLOCK_A 8K
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FW_MAIN_B(CBFS) 1M
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VBLOCK_B 8K
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SHARED_DATA 8K
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FMAP 4K
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COREBOOT(CBFS)
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RW_MRC_CACHE(PRESERVE) 64K
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RW_SECTION_A 3M {
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VBLOCK_A 8K
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FW_MAIN_A(CBFS)
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RW_FWID_A 256
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}
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RW_SECTION_B 3M {
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VBLOCK_B 8K
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FW_MAIN_B(CBFS)
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RW_FWID_B 256
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}
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RW_ELOG(PRESERVE) 4K
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RW_SHARED 16K {
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SHARED_DATA 8K
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VBLOCK_DEV 8K
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}
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RW_VPD(PRESERVE) 8K
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RW_NVRAM(PRESERVE) 20K
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SMMSTORE(PRESERVE) 4K
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RW_LEGACY(CBFS)
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WP_RO@8M 8M {
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RO_VPD(PRESERVE) 16K
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RO_SECTION {
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FMAP 2K
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RO_FRID 64
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GBB@4K 448K
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COREBOOT(CBFS)
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}
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}
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}
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}
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