mb/google/octopus: Enable RT5682 headset codec for BIP board
Patch adds required changes for RT5682 codec enablement for the BIP board. And code clean-up nhlt blob selection method in config. BUG=b:77892150 TEST=build and boot on a BIP PO board. verify headset codec i2cdetects at address 1a. Change-Id: Iee91518c03a0e9e6ed52bc54a60fc607730a0b7d Signed-off-by: Naveen Manohar <naveen.m@intel.com> Reviewed-on: https://review.coreboot.org/26211 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -85,9 +85,9 @@ config UART_FOR_CONSOLE
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default 2
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default 2
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config INCLUDE_NHLT_BLOBS
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config INCLUDE_NHLT_BLOBS
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bool "Include blobs for audio."
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bool "Include blobs for audio"
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select NHLT_DMIC_2CH_16B
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select NHLT_DMIC_4CH_16B
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select NHLT_DMIC_4CH_16B
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select NHLT_DA7219
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select NHLT_MAX98357
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select NHLT_MAX98357
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config DRIVER_TPM_SPI_BUS
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config DRIVER_TPM_SPI_BUS
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@ -8,11 +8,14 @@ config BOARD_GOOGLE_YORP
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bool "-> Yorp"
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bool "-> Yorp"
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select BOARD_GOOGLE_BASEBOARD_OCTOPUS
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select BOARD_GOOGLE_BASEBOARD_OCTOPUS
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select BASEBOARD_OCTOPUS_LAPTOP
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select BASEBOARD_OCTOPUS_LAPTOP
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select NHLT_DA7219 if INCLUDE_NHLT_BLOBS
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config BOARD_GOOGLE_BIP
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config BOARD_GOOGLE_BIP
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bool "-> Bip"
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bool "-> Bip"
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select BOARD_GOOGLE_BASEBOARD_OCTOPUS
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select BOARD_GOOGLE_BASEBOARD_OCTOPUS
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select BASEBOARD_OCTOPUS_LAPTOP
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select BASEBOARD_OCTOPUS_LAPTOP
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select NHLT_RT5682 if INCLUDE_NHLT_BLOBS
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config BOARD_GOOGLE_PHASER
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config BOARD_GOOGLE_PHASER
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bool "-> Phaser"
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bool "-> Phaser"
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select BOARD_GOOGLE_BASEBOARD_OCTOPUS
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select BOARD_GOOGLE_BASEBOARD_OCTOPUS
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select BASEBOARD_OCTOPUS_LAPTOP
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select BASEBOARD_OCTOPUS_LAPTOP
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select NHLT_DA7219 if INCLUDE_NHLT_BLOBS
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@ -29,12 +29,21 @@ void __weak variant_nhlt_init(struct nhlt *nhlt)
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if (!nhlt_soc_add_dmic_array(nhlt, 4))
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if (!nhlt_soc_add_dmic_array(nhlt, 4))
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printk(BIOS_ERR, "Added 4CH DMIC arrays.\n");
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printk(BIOS_ERR, "Added 4CH DMIC arrays.\n");
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/* Dialog for Headset codec.
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/*
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* Headset codec is bi-directional but uses the same configuration
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* Headset codec is bi-directional but uses the same configuration
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* settings for render and capture endpoints.
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* settings for render and capture endpoints.
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*/
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*/
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if (!nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP2))
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if (IS_ENABLED(CONFIG_NHLT_DA7219)) {
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printk(BIOS_ERR, "Added Dialog_7219 codec.\n");
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/* Dialog for Headset codec */
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if (!nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP2))
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printk(BIOS_ERR, "Added Dialog_7219 codec.\n");
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}
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if (IS_ENABLED(CONFIG_NHLT_RT5682)) {
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/* Realtek for Headset codec */
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if (!nhlt_soc_add_rt5682(nhlt, AUDIO_LINK_SSP2))
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printk(BIOS_ERR, "Added ALC5682 codec.\n");
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}
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/* MAXIM Smart Amps for left and right speakers. */
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/* MAXIM Smart Amps for left and right speakers. */
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if (!nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP1))
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if (!nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP1))
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@ -142,7 +142,21 @@ chip soc/intel/apollolake
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device pci 16.2 on end # - I2C 2
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device pci 16.2 on end # - I2C 2
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device pci 16.3 on end # - I2C 3
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device pci 16.3 on end # - I2C 3
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device pci 17.0 on end # - I2C 4
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device pci 17.0 on end # - I2C 4
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device pci 17.1 on end # - I2C 5
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device pci 17.1 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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register "name" = ""RT58""
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register "desc" = ""Realtek RT5682""
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)"
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register "probed" = "1"
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register "property_count" = "1"
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# Set the jd_src to RT5668_JD1 for jack detection
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register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
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register "property_list[0].name" = ""realtek,jd-src""
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register "property_list[0].integer" = "1"
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device i2c 1a on end
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end
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end # - I2C 5
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device pci 17.2 on
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device pci 17.2 on
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chip drivers/i2c/generic
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "hid" = ""ELAN0000""
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@ -193,7 +193,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI(GPIO_134, NONE, DEEP),/* GPIO_134 -- SD_CD_OD */
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PAD_CFG_GPI(GPIO_134, NONE, DEEP),/* GPIO_134 -- SD_CD_OD */
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PAD_CFG_GPI_APIC_LOW(GPIO_135, NONE, DEEP),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */
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PAD_CFG_GPI_APIC_LOW(GPIO_135, NONE, DEEP),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */
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PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */
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PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */
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PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */
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PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, EDGE_BOTH, INVERT, HIZCRx1,
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DISPUPD),/* GPIO_137 -- HP_INT_ODL */
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PAD_CFG_GPI(GPIO_138, NONE, DEEP),/* GPIO_138 -- PEN_PDCT_ODL */
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PAD_CFG_GPI(GPIO_138, NONE, DEEP),/* GPIO_138 -- PEN_PDCT_ODL */
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PAD_CFG_GPI_APIC_IOS(GPIO_139, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_138 -- PEN_INT_ODL */
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PAD_CFG_GPI_APIC_IOS(GPIO_139, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_138 -- PEN_INT_ODL */
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 0, DEEP, NONE, Tx1RXDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 0, DEEP, NONE, Tx1RXDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */
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