glados: Enable wake-on-wifi

- Assign GPE DW0 to GPP_B block
- Enable GPP_B16 as ACPI_SCI for wake
- Define PCIe WLAN device in ACPI with GPE0_DW0_16 for _PRW

Note that current designs cannot wake from Deep S3 via wifi.

BUG=chrome-os-partner:40635
BRANCH=none
TEST=tested on glados:
1-disable deep s3 in devicetree.cb
2-enable magic packet with "iw phy phy0 wowlan enable magic-packet"
3-powerd_dbus_suspend to go to S3
4-wake system with magic packet

Change-Id: I989768615e9da8ecf6354852d2db7aae8069aa82
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 894354c5bfd499b911b7f89310c48b503dbaadc2
Original-Change-Id: I9a7a317fc2eccc70fdb4862843de1a654fbc2eee
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/298231
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11650
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/mainboard/google/glados/acpi/mainboard.asl

@@ -57,6 +57,19 @@ Scope (\_SB.PCI0.LPCB)
 	#include <drivers/pc80/tpm/acpi/tpm.asl>
 }
 
+/*
+ * WLAN connected to Root Port 1
+ */
+Scope (\_SB.PCI0.RP01)
+{
+	Device (WLAN)
+	{
+		Name (_ADR, 0x00000000)
+		Name (_DDR, "Wireless LAN")
+		Name (_PRW, Package () { GPE_WLAN_WAKE, 3 })
+	}
+}
+
 Scope (\_SB.PCI0.I2C0)
 {
 	/* Touchscreen */

src/mainboard/google/glados/devicetree.cb

@@ -9,7 +9,7 @@ chip soc/intel/skylake
 	# Note that GPE events called out in ASL code rely on this
 	# route. i.e. If this route changes then the affected GPE
 	# offset bits also need to be changed.
-	register "gpe0_dw0" = "GPP_C"
+	register "gpe0_dw0" = "GPP_B"
 	register "gpe0_dw1" = "GPP_D"
 	register "gpe0_dw2" = "GPP_E"
 

src/mainboard/google/glados/gpio.h

@@ -38,12 +38,15 @@
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE		GPE0_LAN_WAK
 
+/* GPP_B16 is WLAN_WAKE. GPP_B group is routed to DW0 in the GPE0 block */
+#define GPE_WLAN_WAKE		GPE0_DW0_16
+
 /* Input device interrupt configuration */
 #define TOUCHPAD_INT_L		GPP_B3_IRQ
 #define TOUCHSCREEN_INT_L	GPP_E7_IRQ
 #define MIC_INT_L		GPP_F10_IRQ
 
-/* GPP_E16 is EC_SCI_L. GPP_E group is routed to dword 2 in the GPE0 block. */
+/* GPP_E16 is EC_SCI_L. GPP_E group is routed to DW2 in the GPE0 block */
 #define EC_SCI_GPI		GPE0_DW2_16
 #define EC_SMI_GPI		GPP_E15
 
@@ -90,7 +93,7 @@ static const struct pad_config gpio_table[] = {
 /* PLTRST# */		PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
 /* SPKR */		/* GPP_B14 */
 /* GSPI0_CS# */		/* GPP_B15 */
-/* GSPI0_CLK */		PAD_CFG_GPI_APIC(GPP_B16, NONE, DEEP), /* WLAN WAKE */
+/* GSPI0_CLK */		PAD_CFG_GPI_ACPI_SCI(GPP_B16, NONE, DEEP, YES), /* WLAN WAKE */
 /* GSPI0_MISO */	/* GPP_B17 */
 /* GSPI0_MOSI */	/* GPP_B18 */
 /* GSPI1_CS# */		/* GPP_B19 */