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This problem was introduced with 

http://tracker.coreboot.org/trac/coreboot/changeset/3953

Note that all corresponding DSDTs only ever check TOM2 against 0.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Tobias Diedrich 2010-11-17 11:02:05 +00:00 committed by Rudolf Marek
parent 8a71dcd321
commit e0c0a82954
15 changed files with 51 additions and 29 deletions
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5
src/mainboard/amd/dbm690t/dsdt.asl
View File

@ -1129,7 +1129,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1557,7 +1557,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/amd/mahogany/dsdt.asl
View File

@ -1126,7 +1126,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1572,7 +1572,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/amd/mahogany_fam10/dsdt.asl
View File

@ -1168,7 +1168,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1614,7 +1614,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/amd/pistachio/dsdt.asl
View File

@ -1128,7 +1128,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1480,7 +1480,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/amd/tilapia_fam10/dsdt.asl
View File

@ -1168,7 +1168,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1614,7 +1614,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/asrock/939a785gmh/dsdt.asl
View File

@ -1122,7 +1122,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1530,7 +1530,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/asus/m4a785-m/dsdt.asl
View File

@ -1168,7 +1168,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1614,7 +1614,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/gigabyte/ma785gmt/dsdt.asl
View File

@ -1168,7 +1168,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1614,7 +1614,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/gigabyte/ma78gm/dsdt.asl
View File

@ -1168,7 +1168,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1614,7 +1614,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/iei/kino-780am2-fam10/dsdt.asl
View File

@ -1168,7 +1168,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1614,7 +1614,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/jetway/pa78vm5/dsdt.asl
View File

@ -1168,7 +1168,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1614,7 +1614,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/kontron/kt690/dsdt.asl
View File

@ -1129,7 +1129,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1557,7 +1557,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/technexion/tim5690/dsdt.asl
View File

@ -1129,7 +1129,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1557,7 +1557,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

5
src/mainboard/technexion/tim8690/dsdt.asl
View File

@ -1129,7 +1129,7 @@ DefinitionBlock (
/* Note: Only need HID on Primary Bus */ /* Note: Only need HID on Primary Bus */
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
@ -1557,7 +1557,8 @@ DefinitionBlock (
/* /*
* If(LNotEqual(TOM2, 0x00000000)){ * If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
* Subtract(TOM2, 0x100000000, DMHL) * ShiftLeft(TOM2, 20, Local0)
* Subtract(Local0, 0x100000000, DMHL)
* } * }
*/ */

10
src/northbridge/amd/amdk8/amdk8_acpi.c
View File

@ -270,7 +270,15 @@ int k8acpi_write_vars(void)
msr = rdmsr(TOP_MEM); msr = rdmsr(TOP_MEM);
lens += acpigen_write_name_dword("TOM1", msr.lo); lens += acpigen_write_name_dword("TOM1", msr.lo);
msr = rdmsr(TOP_MEM2); msr = rdmsr(TOP_MEM2);
lens += acpigen_write_name_qword("TOM2", (((uint64_t) msr.hi) << 32) | msr.lo); /*
* Since XP only implements parts of ACPI 2.0, we can't use a qword
* here.
* See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt
* slide 22ff.
* Shift value right by 20 bit to make it fit into 32bit,
* giving us 1MB granularity and a limit of almost 4Exabyte of memory.
*/
lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20);
lens += k8acpi_write_HT(); lens += k8acpi_write_HT();
//minus opcode //minus opcode