soc/intel/tigerlake: add soc implementation for ETR address API
Add soc_pmc_etr_addr function definition in tigerlake SOC code. The function is declared in common soc intel pmc driver. Change-Id: Icc471b16304c72a9341abdd9797ba3f8d0d3d1bc Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37555 Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Ravishankar Sarawadi <ravishankar.sarawadi@intel.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -177,6 +177,12 @@ uintptr_t soc_read_pmc_base(void)
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return (uintptr_t)pmc_mmio_regs();
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}
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uint32_t *soc_pmc_etr_addr(void)
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{
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return (uint32_t *)(soc_read_pmc_base() + ETR);
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}
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void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
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{
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DEVTREE_CONST struct soc_intel_tigerlake_config *config;
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