mb/google/brya/var/skolas: add RPL 28W dptf settings
Add Raptor Lake (RPL) 28W dptf settings for Skolas BUG=b:235311241 BRANCH=firmware-brya-14505.B TEST=Built and tested on skolas Change-Id: I4364ca6a50906c2a6dd0e754238264c680e7ebd0 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72728 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Sumeet Pawnikar
Felix Held
parent
a2e0c3d209
commit
e10ff6d05b
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@ -117,6 +117,132 @@ chip soc/intel/alderlake
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device domain 0 on
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DRAM_SOC""
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register "options.tsr[1].desc" = ""Ambient""
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register "options.tsr[2].desc" = ""Charger""
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register "options.tsr[3].desc" = ""WWAN""
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# TODO: below values are initial reference values only
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## Active Policy
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register "policies.active" = "{
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[0] = {
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.target = DPTF_TEMP_SENSOR_0,
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.thresholds = {
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TEMP_PCT(75, 95),
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TEMP_PCT(70, 90),
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TEMP_PCT(65, 80),
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TEMP_PCT(60, 70),
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TEMP_PCT(55, 60),
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TEMP_PCT(50, 50),
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TEMP_PCT(45, 40),
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TEMP_PCT(40, 30),
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}
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},
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[1] = {
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.target = DPTF_TEMP_SENSOR_1,
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.thresholds = {
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TEMP_PCT(75, 95),
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TEMP_PCT(70, 90),
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TEMP_PCT(65, 80),
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TEMP_PCT(60, 70),
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TEMP_PCT(55, 60),
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TEMP_PCT(50, 50),
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TEMP_PCT(45, 40),
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TEMP_PCT(40, 30),
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}
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},
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[2] = {
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.target = DPTF_TEMP_SENSOR_2,
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.thresholds = {
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TEMP_PCT(82, 97),
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TEMP_PCT(78, 93),
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TEMP_PCT(72, 86),
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TEMP_PCT(66, 60),
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TEMP_PCT(60, 40),
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}
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},
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[3] = {
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.target = DPTF_TEMP_SENSOR_3,
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.thresholds = {
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TEMP_PCT(75, 95),
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TEMP_PCT(70, 90),
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TEMP_PCT(65, 80),
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TEMP_PCT(60, 70),
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TEMP_PCT(55, 60),
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TEMP_PCT(50, 50),
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TEMP_PCT(45, 40),
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TEMP_PCT(40, 30),
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}
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}
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}"
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 97, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000),
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[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 5000),
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[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 80, 5000),
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[4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 85, 5000),
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 115, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),
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[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 90, SHUTDOWN),
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}"
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 28000,
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.max_power = 28000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 64000,
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.max_power = 64000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 1700 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }
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}"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf" = "{
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[0] = { 90, 6700, 220, 2200, },
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[1] = { 80, 5800, 180, 1800, },
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[2] = { 70, 5000, 145, 1450, },
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[3] = { 60, 4900, 115, 1150, },
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[4] = { 50, 3838, 90, 900, },
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[5] = { 40, 2904, 55, 550, },
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[6] = { 30, 2337, 30, 300, },
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[7] = { 20, 1608, 15, 150, },
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[8] = { 10, 800, 10, 100, },
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[9] = { 0, 0, 0, 50, }
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}"
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## Fan options
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register "options.fan.fine_grained_control" = "1"
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register "options.fan.step_size" = "2"
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device generic 0 on
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probe THERMAL THERMAL_28W
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end
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end
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DRAM_SOC""
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@ -235,7 +361,9 @@ chip soc/intel/alderlake
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register "options.fan.fine_grained_control" = "1"
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register "options.fan.step_size" = "2"
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device generic 0 alias dptf_policy on end
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device generic 1 on
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probe THERMAL THERMAL_15W
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end
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end
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end
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device ref ipu on
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