diff --git a/src/mainboard/51nb/x210/romstage.c b/src/mainboard/51nb/x210/romstage.c index 38652b5068..8a8fa4fac6 100644 --- a/src/mainboard/51nb/x210/romstage.c +++ b/src/mainboard/51nb/x210/romstage.c @@ -36,6 +36,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget); mem_cfg->DqPinsInterleaved = TRUE; + mem_cfg->CaVrefConfig = 2; mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t) blk.spd_array[0]; mem_cfg->MemorySpdPtr10 = (uintptr_t) blk.spd_array[1]; diff --git a/src/mainboard/asrock/h110m/romstage.c b/src/mainboard/asrock/h110m/romstage.c index f78aa30b21..aec7925772 100644 --- a/src/mainboard/asrock/h110m/romstage.c +++ b/src/mainboard/asrock/h110m/romstage.c @@ -22,6 +22,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) assert(sizeof(mem_cfg->RcompTarget) == sizeof(rcomp_targets)); mem_cfg->DqPinsInterleaved = 1; + mem_cfg->CaVrefConfig = 2; get_spd_smbus(&blk); mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; diff --git a/src/mainboard/clevo/kbl-u/variants/n13xwu/romstage.c b/src/mainboard/clevo/kbl-u/variants/n13xwu/romstage.c index 4e9d57c21a..116d418f63 100644 --- a/src/mainboard/clevo/kbl-u/variants/n13xwu/romstage.c +++ b/src/mainboard/clevo/kbl-u/variants/n13xwu/romstage.c @@ -32,6 +32,7 @@ void variant_configure_fspm(FSPM_UPD *mupd) mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget); mem_cfg->DqPinsInterleaved = TRUE; + mem_cfg->CaVrefConfig = 2; mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; diff --git a/src/mainboard/facebook/monolith/romstage.c b/src/mainboard/facebook/monolith/romstage.c index 0a7a071da1..842724cb20 100644 --- a/src/mainboard/facebook/monolith/romstage.c +++ b/src/mainboard/facebook/monolith/romstage.c @@ -19,6 +19,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget); mem_cfg->DqPinsInterleaved = 1; + mem_cfg->CaVrefConfig = 2; get_spd_smbus(&blk); mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; diff --git a/src/mainboard/google/fizz/romstage.c b/src/mainboard/google/fizz/romstage.c index 85475e5411..5df33daf22 100644 --- a/src/mainboard/google/fizz/romstage.c +++ b/src/mainboard/google/fizz/romstage.c @@ -27,6 +27,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) .addr_map = { 0x50, 0x52, }, }; mem_cfg->DqPinsInterleaved = 1; + mem_cfg->CaVrefConfig = 2; get_spd_smbus(&blk); mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; diff --git a/src/mainboard/kontron/bsl6/romstage.c b/src/mainboard/kontron/bsl6/romstage.c index f38734c25c..b77073ca96 100644 --- a/src/mainboard/kontron/bsl6/romstage.c +++ b/src/mainboard/kontron/bsl6/romstage.c @@ -37,6 +37,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) sizeof(memory_params->RcompTarget)); memory_params->DqPinsInterleaved = true; + memory_params->CaVrefConfig = 2; const uint8_t ht = get_uint_option("hyper_threading", memory_params->HyperThreading); memory_params->HyperThreading = ht; diff --git a/src/mainboard/purism/librem_skl/romstage.c b/src/mainboard/purism/librem_skl/romstage.c index 1c907716c4..604db60e61 100644 --- a/src/mainboard/purism/librem_skl/romstage.c +++ b/src/mainboard/purism/librem_skl/romstage.c @@ -29,6 +29,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) memcpy(mem_cfg->RcompTarget, rcomp_targets, sizeof(mem_cfg->RcompTarget)); mem_cfg->DqPinsInterleaved = TRUE; + mem_cfg->CaVrefConfig = 2; mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t) blk.spd_array[0]; diff --git a/src/mainboard/supermicro/x11-lga1151-series/romstage.c b/src/mainboard/supermicro/x11-lga1151-series/romstage.c index 67636575ce..b4347d9df9 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/romstage.c +++ b/src/mainboard/supermicro/x11-lga1151-series/romstage.c @@ -13,6 +13,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; mem_cfg->DqPinsInterleaved = 1; + mem_cfg->CaVrefConfig = 2; get_spd_smbus(&blk); mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0];