soc/intel/common: Save Memory DIMM Information in SMBIOS table
Save SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM. Add function dimm_info_fill() which populates SMBIOS memory information from FSP MEM_INFO_DATA_HOB data. BUG=chrome-os-partner:61729 BRANCH=none TEST=Build and boot KBLRVP to verify the type 17 DIMM info coming in SMBIOS table from Kernel command "dmidecode". Change-Id: I0fd7c9887076d3fdd320fcbdcc873cb1965b950c Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/18418 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -13,6 +13,7 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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romstage-y += util.c
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romstage-$(CONFIG_MMA) += mma.c
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romstage-y += smbios.c
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postcar-y += util.c
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postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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@ -0,0 +1,53 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Intel Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <smbios.h>
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#include "smbios.h"
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#include <string.h>
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#include <console/console.h>
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/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
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void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
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u32 frequency, u8 channel_id, u8 dimm_id, const char *module_part_num,
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u16 data_width)
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{
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dimm->dimm_size = dimm_capacity;
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dimm->ddr_type = ddr_type;
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dimm->ddr_frequency = frequency;
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dimm->channel_num = channel_id;
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dimm->dimm_num = dimm_id;
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strncpy((char *)dimm->module_part_number,
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module_part_num,
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sizeof(dimm->module_part_number));
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switch (data_width) {
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case 8:
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dimm->bus_width = MEMORY_BUS_WIDTH_8;
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break;
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case 16:
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dimm->bus_width = MEMORY_BUS_WIDTH_16;
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break;
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case 32:
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dimm->bus_width = MEMORY_BUS_WIDTH_32;
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break;
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case 64:
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dimm->bus_width = MEMORY_BUS_WIDTH_64;
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break;
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case 128:
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dimm->bus_width = MEMORY_BUS_WIDTH_128;
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break;
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default:
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printk(BIOS_ERR, "Incorrect DIMM Data width");
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}
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}
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@ -0,0 +1,27 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Intel Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _COMMON_SMBIOS_H_
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#define _COMMON_SMBIOS_H_
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#include <stdint.h>
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#include <memory_info.h>
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/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
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void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
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u32 frequency, u8 channel_id, u8 dimm_id, const char *module_part_num,
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u16 data_width);
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#endif /* _COMMON_SMBIOS_H_ */
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