make sure stack resides in cache
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -33,40 +33,48 @@ system_reset:
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#if USE_DCACHE_RAM == 1
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#if USE_DCACHE_RAM == 1
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#define DCACHE_RAM_END (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - 1)
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#define DCACHE_RAM_END (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - 1)
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/*
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/*
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* Setup stack in cache
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* Set up stack in cache. The SP must be 16-byte (4-word) aligned
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* for SYSV EABI or 8-byte (2-word) aligned for PPC EABI, so we make
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* it 16-byte aligned to cover both cases. Also we have to ensure that
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* the first word is located within the cache.
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*/
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*/
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lis r1, DCACHE_RAM_END@ha
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lis r1, (DCACHE_RAM_BASE+DCACHE_RAM_SIZE)@h
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addi r1, r1, DCACHE_RAM_END@l
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ori r1, r1, (DCACHE_RAM_BASE+DCACHE_RAM_SIZE)@l
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stwu r0,-64(r1)
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lis r0, 0
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stwu r1,-24(r1)
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stwu r0, -4(r1)
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stwu r0, -4(r1)
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stwu r0, -4(r1)
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stwu r0, -4(r1)
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#if 0
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/*
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/*
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* Clear stack
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* Clear stack
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*/
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*/
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lis r4, DCACHE_RAM_BASE@ha
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lis r4, DCACHE_RAM_BASE@h
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addi r4, r4, DCACHE_RAM_BASE@l
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ori r4, r4, DCACHE_RAM_BASE@l
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lis r7, DCACHE_RAM_END@ha
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lis r7, DCACHE_RAM_END@h
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addi r7, r7, DCACHE_RAM_END@l
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ori r7, r7, DCACHE_RAM_END@l
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lis r5, 0
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lis r5, 0
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1: stwx r5, 0, r4
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1: stwx r5, 0, r4
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addi r4, r4, 4
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addi r4, r4, 4
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cmp 0, 0, r4, r7
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cmp 0, 0, r4, r7
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ble 1b
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ble 1b
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sync
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sync
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#endif
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/*
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/*
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* Set up the EABI pointers, before we enter any C code
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* Set up the EABI pointers, before we enter any C code
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*/
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*/
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lis r13, _SDA_BASE_@ha
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lis r13, _SDA_BASE_@h
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addi r13, r13, _SDA_BASE_@l
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ori r13, r13, _SDA_BASE_@l
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lis r2, _SDA2_BASE_@ha
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lis r2, _SDA2_BASE_@h
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addi r2, r2, _SDA2_BASE_@l
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ori r2, r2, _SDA2_BASE_@l
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/*
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/*
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* load start address into SRR0 for rfi
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* load start address into SRR0 for rfi
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*/
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*/
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lis r3, ppc_main@ha
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lis r3, ppc_main@h
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addi r3, r3, ppc_main@l
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ori r3, r3, ppc_main@l
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mtspr SRR0, r3
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mtspr SRR0, r3
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/*
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/*
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@ -79,8 +87,8 @@ system_reset:
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/*
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/*
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* If something returns after rfi then die
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* If something returns after rfi then die
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*/
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*/
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lis r3, dead@ha
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lis r3, dead@h
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addi r3, r3, dead@l
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ori r3, r3, dead@l
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mtlr r3
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mtlr r3
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/*
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/*
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