soc/intel: Fix chip_info for PCH_DEV_PMC
Since PCH_DEVFN_PMC device is a PCI device that may be hidden from enumeration, use SA_DEVFN_ROOT instead to locate the SOC configuration. Change-Id: I4b5195827fb32ec1dbd0bd6c9e243f4f9a4775ca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -56,7 +56,6 @@ static void pch_handle_sideband(config_t *config)
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static void pch_finalize(void)
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{
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struct device *dev;
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uint32_t reg32;
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uint8_t *pmcbase;
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config_t *config;
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@ -74,8 +73,7 @@ static void pch_finalize(void)
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* point and hence removed from the root bus. pcidev_path_on_root thus
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* returns NULL for PCH_DEV_PMC device.
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*/
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dev = SA_DEV_ROOT;
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config = dev->chip_info;
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config = config_of_path(SA_DEVFN_ROOT);
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pmcbase = pmc_mmio_regs();
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if (config->PmTimerDisabled) {
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reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
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@ -175,14 +175,7 @@ uintptr_t soc_read_pmc_base(void)
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void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
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{
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DEVTREE_CONST struct soc_intel_cannonlake_config *config;
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/* Look up the device in devicetree */
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DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_PMC);
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if (!dev || !dev->chip_info) {
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printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
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return;
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}
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config = dev->chip_info;
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config = config_of_path(SA_DEVFN_ROOT);
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/* Assign to out variable */
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*dw0 = config->gpe0_dw0;
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@ -54,7 +54,6 @@ static void pch_handle_sideband(config_t *config)
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static void pch_finalize(void)
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{
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struct device *dev;
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uint32_t reg32;
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uint8_t *pmcbase;
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config_t *config;
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@ -74,8 +73,7 @@ static void pch_finalize(void)
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* point and hence removed from the root bus. pcidev_path_on_root thus
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* returns NULL for PCH_DEV_PMC device.
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*/
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dev = SA_DEV_ROOT;
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config = dev->chip_info;
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config = config_of_path(SA_DEVFN_ROOT);
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pmcbase = pmc_mmio_regs();
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if (config->PmTimerDisabled) {
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reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
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@ -174,13 +174,7 @@ void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
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{
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DEVTREE_CONST struct soc_intel_icelake_config *config;
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/* Look up the device in devicetree */
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DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_PMC);
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if (!dev || !dev->chip_info) {
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printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
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return;
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}
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config = dev->chip_info;
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config = config_of_path(SA_DEVFN_ROOT);
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/* Assign to out variable */
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*dw0 = config->gpe0_dw0;
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