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soc/intel: Fix chip_info for PCH_DEV_PMC 

Since PCH_DEVFN_PMC device is a PCI device that may be
hidden from enumeration, use SA_DEVFN_ROOT instead to
locate the SOC configuration.

Change-Id: I4b5195827fb32ec1dbd0bd6c9e243f4f9a4775ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Kyösti Mälkki 2019-07-13 09:44:43 +03:00 committed by Martin Roth
parent 3a82e9b8a3
commit e1559eb84f
4 changed files with 4 additions and 21 deletions
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4
src/soc/intel/cannonlake/finalize.c
View File

@ -56,7 +56,6 @@ static void pch_handle_sideband(config_t *config)
static void pch_finalize(void) static void pch_finalize(void)
{ {
struct device *dev;
uint32_t reg32; uint32_t reg32;
uint8_t *pmcbase; uint8_t *pmcbase;
config_t *config; config_t *config;
@ -74,8 +73,7 @@ static void pch_finalize(void)
* point and hence removed from the root bus. pcidev_path_on_root thus * point and hence removed from the root bus. pcidev_path_on_root thus
* returns NULL for PCH_DEV_PMC device. * returns NULL for PCH_DEV_PMC device.
*/ */
dev = SA_DEV_ROOT; config = config_of_path(SA_DEVFN_ROOT);
config = dev->chip_info;
pmcbase = pmc_mmio_regs(); pmcbase = pmc_mmio_regs();
if (config->PmTimerDisabled) { if (config->PmTimerDisabled) {
reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL); reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);

9
src/soc/intel/cannonlake/pmutil.c
View File

@ -175,14 +175,7 @@ uintptr_t soc_read_pmc_base(void)
void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
{ {
DEVTREE_CONST struct soc_intel_cannonlake_config *config; DEVTREE_CONST struct soc_intel_cannonlake_config *config;
config = config_of_path(SA_DEVFN_ROOT);
/* Look up the device in devicetree */
DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_PMC);
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
return;
}
config = dev->chip_info;
/* Assign to out variable */ /* Assign to out variable */
*dw0 = config->gpe0_dw0; *dw0 = config->gpe0_dw0;

4
src/soc/intel/icelake/finalize.c
View File

@ -54,7 +54,6 @@ static void pch_handle_sideband(config_t *config)
static void pch_finalize(void) static void pch_finalize(void)
{ {
struct device *dev;
uint32_t reg32; uint32_t reg32;
uint8_t *pmcbase; uint8_t *pmcbase;
config_t *config; config_t *config;
@ -74,8 +73,7 @@ static void pch_finalize(void)
* point and hence removed from the root bus. pcidev_path_on_root thus * point and hence removed from the root bus. pcidev_path_on_root thus
* returns NULL for PCH_DEV_PMC device. * returns NULL for PCH_DEV_PMC device.
*/ */
dev = SA_DEV_ROOT; config = config_of_path(SA_DEVFN_ROOT);
config = dev->chip_info;
pmcbase = pmc_mmio_regs(); pmcbase = pmc_mmio_regs();
if (config->PmTimerDisabled) { if (config->PmTimerDisabled) {
reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL); reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);

8
src/soc/intel/icelake/pmutil.c
View File

@ -174,13 +174,7 @@ void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
{ {
DEVTREE_CONST struct soc_intel_icelake_config *config; DEVTREE_CONST struct soc_intel_icelake_config *config;
/* Look up the device in devicetree */ config = config_of_path(SA_DEVFN_ROOT);
DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_PMC);
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
return;
}
config = dev->chip_info;
/* Assign to out variable */ /* Assign to out variable */
*dw0 = config->gpe0_dw0; *dw0 = config->gpe0_dw0;