sb/intel/lynxpoint/acpi/lpc.asl: Simplify GPIOBASE resource

LynxPoint-LP handles GPIOs differently, and LynxPoint-H has the same
GPIO kind as previous-generation PCHs, such as Cougar Point. Remove some
unneeded logic from `_CRS` and declare the GPIOBASE resource statically.

The preprocessor allows later ACPI deduplication to remain reproducible.

Change-Id: If771d5b6c3a1623da7d015ed50199877615409b2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46781
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-25 21:37:01 +01:00 committed by Michael Niewöhner
parent 59ea8ef9e1
commit e15dc9eb1e
1 changed files with 6 additions and 15 deletions

View File

@ -157,25 +157,16 @@ Device (LPCB)
IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI
IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0xff) IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0xff)
// GPIO region may be 128 bytes or 4096 bytes #if !CONFIG(INTEL_LYNXPOINT_LP)
IO (Decode16, 0x0000, 0x0000, 0x1, 0x00, GPR1) // LynxPoint-LP GPIO resources are defined in the
// SerialIO GPIO device and LynxPoint-H GPIO resources
// are defined here.
IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40)
#endif
}) })
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// LynxPoint-LP GPIO resources are defined in the
// SerialIO GPIO device and LynxPoint-H GPIO resources
// are defined here.
If (!\ISLP ()) {
CreateByteField (^RBUF, ^GPR1._LEN, R1LN)
CreateWordField (^RBUF, ^GPR1._MIN, R1MN)
CreateWordField (^RBUF, ^GPR1._MAX, R1MX)
// Update GPIO region length
R1MN = DEFAULT_GPIOBASE
R1MX = DEFAULT_GPIOBASE
R1LN = DEFAULT_GPIOSIZE
}
Return (RBUF) Return (RBUF)
} }
} }