soc/intel/cnl: Add new Kconfig option which matches its FSPs name
Since there are 4 different versions of FSPs for the Comet Lake platform, add a new Kconfig option for the currently used SoC being able to differ between the various SoCs and FSPs. The new Kconfig option selects the Comet Lake SoC as base for taking over its specific configuration and is only used for configuring the path to its specific FSP header files and FSP binary. Also, adjust all related mainboards so that their Kconfig selects the new option. For details, please see https://github.com/intel/FSP/tree/master/CometLakeFspBinPkg Built System76/lemp9 with BUILD_TIMELESS=1 before and after this patch and both images are equal. Change-Id: I44b717bb942fbcd359c7a06ef1a0ef4306697f64 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44952 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
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@ -16,7 +16,7 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_I2C_TPM_CR50
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select MAINBOARD_HAS_I2C_TPM_CR50
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select MAINBOARD_HAS_TPM2
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select MAINBOARD_HAS_TPM2
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMETLAKE_1
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
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select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
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select SYSTEM_TYPE_LAPTOP
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select SYSTEM_TYPE_LAPTOP
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@ -39,7 +39,7 @@ config BOARD_GOOGLE_HATCH_COMMON
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select MAINBOARD_HAS_SPI_TPM_CR50
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select MAINBOARD_HAS_SPI_TPM_CR50
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select MAINBOARD_HAS_TPM2
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select MAINBOARD_HAS_TPM2
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select MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
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select MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMETLAKE_1
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select SOC_INTEL_COMMON_BLOCK_DTT
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select SOC_INTEL_COMMON_BLOCK_DTT
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if BOARD_GOOGLE_HATCH_COMMON
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if BOARD_GOOGLE_HATCH_COMMON
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@ -14,4 +14,4 @@ config BOARD_INTEL_COFFEELAKE_RVP8
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COFFEELAKE
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config BOARD_INTEL_COMETLAKE_RVPU
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config BOARD_INTEL_COMETLAKE_RVPU
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bool "-> Cometlake U DDR4 RVP"
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bool "-> Cometlake U DDR4 RVP"
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMETLAKE_1
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@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS
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select MAINBOARD_HAS_LPC_TPM
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select MAINBOARD_HAS_LPC_TPM
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select MAINBOARD_HAS_TPM2
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select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select NO_UART_ON_SUPERIO
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMETLAKE_1
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SPD_READ_BY_WORD
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select SPD_READ_BY_WORD
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@ -47,6 +47,10 @@ config SOC_INTEL_COMETLAKE
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help
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help
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Intel Cometlake support
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Intel Cometlake support
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config SOC_INTEL_COMETLAKE_1
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bool
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select SOC_INTEL_COMETLAKE
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config SOC_INTEL_CANNONLAKE_PCH_H
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config SOC_INTEL_CANNONLAKE_PCH_H
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bool
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bool
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help
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help
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@ -313,12 +317,12 @@ endchoice
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config FSP_HEADER_PATH
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config FSP_HEADER_PATH
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default "3rdparty/fsp/CoffeeLakeFspBinPkg/Include/" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
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default "3rdparty/fsp/CoffeeLakeFspBinPkg/Include/" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
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default "3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/" if SOC_INTEL_COMETLAKE
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default "3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/" if SOC_INTEL_COMETLAKE_1
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default "src/vendorcode/intel/fsp/fsp2_0/cannonlake/" if SOC_INTEL_CANNONLAKE
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default "src/vendorcode/intel/fsp/fsp2_0/cannonlake/" if SOC_INTEL_CANNONLAKE
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config FSP_FD_PATH
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config FSP_FD_PATH
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default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
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default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
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default "3rdparty/fsp/CometLakeFspBinPkg/CometLake1/FSP.fd" if SOC_INTEL_COMETLAKE
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default "3rdparty/fsp/CometLakeFspBinPkg/CometLake1/FSP.fd" if SOC_INTEL_COMETLAKE_1
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config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
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config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
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int "Debug Consent for CNL"
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int "Debug Consent for CNL"
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