sb,soc/intel: Fix GNVS OperationRegion
Structure with chromeos_acpi_t is expected to have size 0x1000. Only ones with device_nvs_t have size 0x2000. Change-Id: I2eaa3a008566853b4144fa34ccffaa232d5d8e24 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
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@ -13,7 +13,7 @@ Name (\PICM, 0) // IOAPIC/8259
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External (NVSA)
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External (NVSA)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x2000)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x1000)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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{
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/* Miscellaneous */
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/* Miscellaneous */
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@ -12,7 +12,7 @@ Name(\PICM, 0) // IOAPIC/8259
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External(NVSA)
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External(NVSA)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x2000)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x100)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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{
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/* Miscellaneous */
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/* Miscellaneous */
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@ -13,7 +13,7 @@ Name (\PICM, 0) // IOAPIC/8259
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External (NVSA)
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External (NVSA)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x2000)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x1000)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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{
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/* Miscellaneous */
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/* Miscellaneous */
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@ -11,7 +11,7 @@ Name(\PICM, 0) // IOAPIC/8259
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*/
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*/
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External(NVSA)
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External(NVSA)
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OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x1000)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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{
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/* Miscellaneous */
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/* Miscellaneous */
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@ -12,7 +12,7 @@ Name (\PICM, 0) // IOAPIC/8259
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*/
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*/
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External (NVSA)
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External (NVSA)
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OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x1000)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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{
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/* Miscellaneous */
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/* Miscellaneous */
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