GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

libpayload: usb: xhci: Treat port reset as a port status change 

If a port is connected before and after an xhci controller reset, the
PORTSC CSC bit may not be asserted. Add an additional check in
xhci_rh_port_status_changed for the PRC bit so we can correctly handle
ports in such a state.

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I2d623aae647ab13711badd7211ab467afdc69548
Reviewed-on: https://chromium-review.googlesource.com/189394
Reviewed-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit ee7c3ea182b35bb6ce3c62f301c4515714f6e654)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/7002
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Shawn Nematbakhsh 2014-03-10 14:46:06 -07:00 committed by Isaac Christensen
parent a16029a93d
commit e1dad0c0b9
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
payloads/libpayload/drivers/usb/xhci_rh.c
View File

@ -51,7 +51,7 @@ xhci_rh_port_status_changed(usbdev_t *const dev, const int port)
xhci_t *const xhci = XHCI_INST(dev->controller);
volatile u32 *const portsc = &xhci->opreg->prs[port - 1].portsc;
const int changed = !!(*portsc & PORTSC_CSC);
const int changed = !!(*portsc & (PORTSC_CSC | PORTSC_PRC));
/* always clear all the status change bits */
*portsc = (*portsc & PORTSC_RW_MASK) | 0x00ef0000;
return changed;