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soc/amd: Rename to soc_fill_gnvs() 

Replace acpi_create_gnvs() under soc/ to reflect their
changed functionality.

Change-Id: I61010f64a4a935f238e6dcd0f8c1340a6cc68eb4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2020-06-29 03:17:05 +03:00 committed by Angel Pons
parent 39c16b5c60
commit e1ff3cd014
3 changed files with 13 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/include/acpi/acpi_gnvs.h
View File

@ -26,13 +26,10 @@ struct device;
void southbridge_inject_dsdt(const struct device *device);
/*
* This function populates the gnvs structure in acpi table.
* These functions populate the gnvs structure in acpi table.
* Defined as weak in common acpi as gnvs structure definition is
* chipset specific.
*/
void acpi_create_gnvs(struct global_nvs *gnvs);
void soc_fill_gnvs(struct global_nvs *gnvs);
void mainboard_fill_gnvs(struct global_nvs *gnvs);

19
src/soc/amd/picasso/acpi.c
View File

@ -15,7 +15,6 @@
#include <cpu/amd/cpuid.h>
#include <cpu/amd/msr.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
#include <device/device.h>
#include <device/pci.h>
#include <amdblocks/acpimmio.h>
@ -394,7 +393,7 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
return acpi_write_hpet(device, current, rsdp);
}
void acpi_create_gnvs(struct global_nvs *gnvs)
void soc_fill_gnvs(struct global_nvs *gnvs)
{
/* Set unknown wake source */
gnvs->pm1i = ~0ULL;
@ -406,18 +405,12 @@ void acpi_create_gnvs(struct global_nvs *gnvs)
void southbridge_inject_dsdt(const struct device *device)
{
struct global_nvs *gnvs;
struct global_nvs *gnvs = acpi_get_gnvs();
if (!gnvs)
return;
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (gnvs) {
acpi_create_gnvs(gnvs);
/* Add it to DSDT */
acpigen_write_scope("\\");
acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
acpigen_pop_len();
}
soc_fill_gnvs(gnvs);
acpi_inject_nvsa();
}
static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)

19
src/soc/amd/stoneyridge/acpi.c
View File

@ -12,7 +12,6 @@
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
#include <device/device.h>
#include <device/pci.h>
#include <amdblocks/acpimmio.h>
@ -162,7 +161,7 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
return acpi_write_hpet(device, current, rsdp);
}
void acpi_create_gnvs(struct global_nvs *gnvs)
void soc_fill_gnvs(struct global_nvs *gnvs)
{
/* Set unknown wake source */
gnvs->pm1i = ~0ULL;
@ -174,18 +173,12 @@ void acpi_create_gnvs(struct global_nvs *gnvs)
void southbridge_inject_dsdt(const struct device *device)
{
struct global_nvs *gnvs;
struct global_nvs *gnvs = acpi_get_gnvs();
if (!gnvs)
return;
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (gnvs) {
acpi_create_gnvs(gnvs);
/* Add it to DSDT */
acpigen_write_scope("\\");
acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
acpigen_pop_len();
}
soc_fill_gnvs(gnvs);
acpi_inject_nvsa();
}
static void acpigen_soc_get_gpio_in_local5(uintptr_t addr)