usbdebug: Move under drivers/usb

Also relocate and split header files, there is some interest
for EHCI debug support without PCI.

Change-Id: Ibe91730eb72dfe0634fb38bdd184043495e2fb08
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5129
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

src/arch/x86/lib/romstage_console.c

@@ -23,7 +23,7 @@
 #include <uart8250.h>
 #endif
 #if CONFIG_USBDEBUG
-#include <usbdebug.h>
+#include <console/usb.h>
 #endif
 #if CONFIG_CONSOLE_NE2K
 #include <console/ne2k.h>

src/console/usbdebug_console.c

@@ -20,7 +20,7 @@
 
 #include <string.h>
 #include <console/console.h>
-#include <usbdebug.h>
+#include <console/usb.h>
 
 static void dbgp_init(void)
 {

src/drivers/Makefile.inc

@@ -29,6 +29,7 @@ subdirs-y += parade
 subdirs-y += realtek
 subdirs-y += sil
 subdirs-y += trident
+subdirs-y += usb
 subdirs-y += ics
 subdirs-y += spi
 subdirs-y += ti

src/drivers/usb/Makefile.inc

@@ -0,0 +1,3 @@
+romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c
+
+ramstage-$(CONFIG_USBDEBUG) += ehci_debug.c

src/drivers/usb/ehci_debug.c

@@ -20,6 +20,8 @@
 
 #include <stddef.h>
 #include <console/console.h>
+#include <console/usb.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 #include <device/pci.h>
 #include <device/pci_def.h>
@@ -28,9 +30,8 @@
 #include <string.h>
 #include <cbmem.h>
 
-#include <usb_ch9.h>
-#include <ehci.h>
-#include <usbdebug.h>
+#include "usb_ch9.h"
+#include "ehci.h"
 
 
 #define DBGP_EP_VALID		(1<<0)

src/include/console/console.h

@@ -28,7 +28,7 @@
 #include <uart.h>
 #endif
 #if CONFIG_USBDEBUG && !defined(__ROMCC__)
-#include <usbdebug.h>
+#include <console/usb.h>
 #endif
 #if CONFIG_CONSOLE_NE2K
 #include <console/ne2k.h>

src/include/console/usb.h

@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 AMD
+ * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#ifndef _CONSOLE_USB_H_
+#define _CONSOLE_USB_H_
+
+struct dbgp_pipe;
+
+int usbdebug_init(void);
+
+struct dbgp_pipe *dbgp_console_output(void);
+struct dbgp_pipe *dbgp_console_input(void);
+int dbgp_ep_is_active(struct dbgp_pipe *pipe);
+int dbgp_bulk_write_x(struct dbgp_pipe *pipe, const char *bytes, int size);
+int dbgp_bulk_read_x(struct dbgp_pipe *pipe, void *data, int size);
+void usbdebug_tx_byte(struct dbgp_pipe *pipe, unsigned char data);
+void usbdebug_tx_flush(struct dbgp_pipe *pipe);
+
+#endif /* _CONSOLE_USB_H_ */

src/include/device/pci_ehci.h

@@ -18,13 +18,15 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
  */
 
-#ifndef USBDEBUG_H
-#define USBDEBUG_H
+#ifndef _PCI_EHCI_H_
+#define _PCI_EHCI_H_
+
+#include <arch/io.h>
+#include <device/device.h>
 
 #define EHCI_BAR_INDEX		0x10
 #define PCI_EHCI_CLASSCODE 	0x0c0320	/* USB2.0 with EHCI controller */
 
-typedef u32 pci_devfn_t;
 pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx);
 unsigned long pci_ehci_base_regs(pci_devfn_t dev);
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port);
@@ -47,15 +49,4 @@ void pci_ehci_read_resources(struct device *dev);
 #endif
 #endif
 
-struct dbgp_pipe;
-
-int usbdebug_init(void);
-
-struct dbgp_pipe *dbgp_console_output(void);
-struct dbgp_pipe *dbgp_console_input(void);
-int dbgp_ep_is_active(struct dbgp_pipe *pipe);
-int dbgp_bulk_write_x(struct dbgp_pipe *pipe, const char *bytes, int size);
-int dbgp_bulk_read_x(struct dbgp_pipe *pipe, void *data, int size);
-void usbdebug_tx_byte(struct dbgp_pipe *pipe, unsigned char data);
-void usbdebug_tx_flush(struct dbgp_pipe *pipe);
-#endif
+#endif /* _PCI_EHCI_H_ */

src/lib/Makefile.inc

@@ -49,7 +49,6 @@ romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
 romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
 romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
 romstage-$(CONFIG_SPKMODEM) += spkmodem.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usbdebug.c
 
 ifeq ($(CONFIG_EARLY_CBMEM_INIT),y)
 romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -92,7 +91,6 @@ romstage-y += clog2.c
 ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
 ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
 ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
-ramstage-$(CONFIG_USBDEBUG) += usbdebug.c
 ramstage-$(CONFIG_SPKMODEM) += spkmodem.c
 ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c
 ramstage-$(CONFIG_TRACE) += trace.c

src/southbridge/amd/agesa/hudson/enable_usbdebug.c

@@ -22,7 +22,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 #include "hudson.h"
 

src/southbridge/amd/agesa/hudson/usb.c

@@ -22,7 +22,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 #include "hudson.h"
 

src/southbridge/amd/cimx/sb700/late.c

@@ -25,7 +25,7 @@
 #include <device/smbus.h>       /* smbus_bus_operations */
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>    /* printk */
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include "lpc.h"                /* lpc_read_resources */
 #include "Platform.h"   /* Platfrom Specific Definitions */
 #include "sb_cimx.h"

src/southbridge/amd/cimx/sb800/late.c

@@ -26,7 +26,7 @@
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>	/* printk */
 #include <arch/acpi.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include "lpc.h"		/* lpc_read_resources */
 #include "SBPLATFORM.h" 	/* Platfrom Specific Definitions */
 #include "cfg.h"		/* sb800 Cimx configuration */

src/southbridge/amd/cimx/sb900/late.c

@@ -24,7 +24,7 @@
 #include <device/smbus.h>	/* smbus_bus_operations */
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>	/* printk */
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include "lpc.h"		/* lpc_read_resources */
 #include "SbPlatform.h" 	/* Platfrom Specific Definitions */
 #include "chip.h" 		/* struct southbridge_amd_cimx_sb900_config */

src/southbridge/amd/sb600/enable_usbdebug.c

@@ -22,7 +22,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 #include "sb600.h"
 

src/southbridge/amd/sb600/usb.c

@@ -22,7 +22,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 #include "sb600.h"
 

src/southbridge/amd/sb700/enable_usbdebug.c

@@ -23,7 +23,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 #include "sb700.h"
 

src/southbridge/amd/sb700/usb.c

@@ -22,7 +22,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 #include "sb700.h"
 

src/southbridge/amd/sb800/enable_usbdebug.c

@@ -22,7 +22,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 #include "sb800.h"
 

src/southbridge/amd/sb800/usb.c

@@ -22,7 +22,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 #include "sb800.h"
 

src/southbridge/intel/bd82x6x/usb_ehci.c

@@ -23,7 +23,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include "pch.h"
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 
 static void usb_ehci_init(struct device *dev)

src/southbridge/intel/bd82x6x/usb_xhci.c

@@ -23,7 +23,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include "pch.h"
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 
 static void usb_xhci_init(struct device *dev)

src/southbridge/intel/common/usb_debug.c

@@ -23,7 +23,7 @@
 #include <stdint.h>
 #include <arch/io.h>
 #include <console/console.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)

src/southbridge/intel/i82801dx/usb2.c

@@ -24,7 +24,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include "i82801dx.h"
 
 static void usb2_init(struct device *dev)

src/southbridge/intel/i82801ex/ehci.c

@@ -3,7 +3,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include "i82801ex.h"
 
 static void ehci_init(struct device *dev)

src/southbridge/intel/i82801gx/usb_ehci.c

@@ -23,7 +23,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include "i82801gx.h"
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 
 static void usb_ehci_init(struct device *dev)

src/southbridge/intel/i82801ix/usb_ehci.c

@@ -23,7 +23,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include "i82801ix.h"
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 
 static void usb_ehci_init(struct device *dev)
 {

src/southbridge/intel/ibexpeak/usb_ehci.c

@@ -24,7 +24,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include "pch.h"
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 
 static void usb_ehci_init(struct device *dev)

src/southbridge/intel/lynxpoint/usb_ehci.c

@@ -23,7 +23,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <arch/io.h>
 #include "pch.h"
 

src/southbridge/nvidia/ck804/enable_usbdebug.c

@@ -26,7 +26,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 #include "ck804.h"
 

src/southbridge/nvidia/mcp55/enable_usbdebug.c

@@ -26,7 +26,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 #include "mcp55.h"
 

src/southbridge/nvidia/mcp55/usb2.c

@@ -27,7 +27,7 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include "mcp55.h"
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 
 static void usb2_init(struct device *dev)
 {

src/southbridge/sis/sis966/enable_usbdebug.c

@@ -28,7 +28,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 #include <device/pci_def.h>
 #include "sis966.h"
 

src/southbridge/sis/sis966/usb2.c

@@ -30,7 +30,7 @@
 #include <device/pci_ops.h>
 #include <arch/io.h>
 #include "sis966.h"
-#include <usbdebug.h>
+#include <device/pci_ehci.h>
 
 static const u8 SiS_SiS7002_init[22][3]={
 	{0x04, 0x00, 0x06},