soc/intel/apollolake: LZ4 Compress FSP-M
FSP-M is not run XIP so it can be compressed. This more than halves the binary size. 364544 bytes -> 168616 bytes. On the up/squared this also results in a 83ms speedup. TESTED: up/squared boots. Change-Id: Ic76b51f0f3007b59ccb9f76b6a57bb9265dab833 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48158 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
parent
6317aff5b3
commit
e247435c6b
|
@ -56,6 +56,7 @@ config CPU_SPECIFIC_OPTIONS
|
||||||
select NO_PM_ACPI_TIMER
|
select NO_PM_ACPI_TIMER
|
||||||
select NO_UART_ON_SUPERIO
|
select NO_UART_ON_SUPERIO
|
||||||
select NO_XIP_EARLY_STAGES
|
select NO_XIP_EARLY_STAGES
|
||||||
|
select FSP_COMPRESS_FSP_M_LZ4
|
||||||
select PARALLEL_MP_AP_WORK
|
select PARALLEL_MP_AP_WORK
|
||||||
select PCIEXP_ASPM
|
select PCIEXP_ASPM
|
||||||
select PCIEXP_COMMON_CLOCK
|
select PCIEXP_COMMON_CLOCK
|
||||||
|
|
Loading…
Reference in New Issue