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soc/intel/meteorlake: Don't offer D3Cold when it's disabled 

Use D3COLD_SUPPORT Kconfig option to adjust the maximum supported sleep
state in ACPI.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ifa55a19727e6adb6864158c2c323d08a0c22b996
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Sean Rhodes 2023-04-17 20:42:47 +01:00 committed by Felix Held
parent 917261d11c
commit e24d9d6b45
4 changed files with 48 additions and 0 deletions
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2
src/soc/intel/meteorlake/acpi/tcss.asl
View File

@ -657,6 +657,7 @@ Scope (\_SB.PCI0)
}
}
#if CONFIG(D3COLD_SUPPORT)
Method (TCON, 0)
{
/* Reset IOM D3 cold bit if it is in D3 cold now. */
@ -763,6 +764,7 @@ Scope (\_SB.PCI0)
STAT = 0
}
}
#endif // D3COLD_SUPPORT
/*
* TCSS xHCI device

20
src/soc/intel/meteorlake/acpi/tcss_dma.asl
View File

@ -27,25 +27,45 @@ Name (STAT, 0x1) /* Variable to save power state 1 - D0, 0 - D3C */
Method (_S0W, 0x0)
{
#if CONFIG(D3COLD_SUPPORT)
Return (0x4)
#else
Return (0x3)
#endif // D3COLD_SUPPORT
}
Method (_PR0)
{
#if CONFIG(D3COLD_SUPPORT)
If (DUID == 0) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 })
}
#else
If (DUID == 0) {
Return (Package() { \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
#endif // D3COLD_SUPPORT
}
Method (_PR3)
{
#if CONFIG(D3COLD_SUPPORT)
If (DUID == 0) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 })
}
#else
If (DUID == 0) {
Return (Package() { \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
#endif // D3COLD_SUPPORT
}
/*

20
src/soc/intel/meteorlake/acpi/tcss_pcierp.asl
View File

@ -247,25 +247,45 @@ Method (_PS3, 0, Serialized)
Method (_S0W, 0x0, NotSerialized)
{
#if CONFIG(D3COLD_SUPPORT)
Return (0x4)
#else
Return (0x3)
#endif // D3COLD_SUPPORT
}
Method (_PR0)
{
#if CONFIG(D3COLD_SUPPORT)
If ((TUID == 0) || (TUID == 1)) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 })
}
#else
If ((TUID == 0) || (TUID == 1)) {
Return (Package() { \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
#endif // D3COLD_SUPPORT
}
Method (_PR3)
{
#if CONFIG(D3COLD_SUPPORT)
If ((TUID == 0) || (TUID == 1)) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 })
}
#else
If ((TUID == 0) || (TUID == 1)) {
Return (Package() { \_SB.PCI0.TBT0 })
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
#endif // D3COLD_SUPPORT
}
/*

6
src/soc/intel/meteorlake/acpi/tcss_xhci.asl
View File

@ -30,7 +30,11 @@ Method (_PS3, 0, Serialized)
Method (_S0W, 0x0, NotSerialized)
{
#if CONFIG(D3COLD_SUPPORT)
Return (0x4)
#else
Return (0x3)
#endif // D3COLD_SUPPORT
}
/*
@ -39,6 +43,7 @@ Method (_S0W, 0x0, NotSerialized)
*/
Name (SD3C, 0)
#if CONFIG(D3COLD_SUPPORT)
Method (_PR0)
{
Return (Package () { \_SB.PCI0.D3C })
@ -48,6 +53,7 @@ Method (_PR3)
{
Return (Package () { \_SB.PCI0.D3C })
}
#endif // D3COLD_SUPPORT
/*
* XHCI controller _DSM method