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soc/intel/xeon_sp: Add functions to store/restore uart state in smm 

When CONFIG_DEBUG_SMI is enabled SMM handler performs console hardware
initialization that may interfere with OS. Here we store the state
before console initialization and restore state before SMM exit.

Tested=On not public yet system, after exiting smm, uart console can
still work well.

Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: Ifa5042c24f0e3217a75971d9e6067b1d1f56a484
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
This commit is contained in:
Tim Chu 2022-10-19 06:24:21 +00:00 committed by Felix Held
parent 5e5335da68
commit e27e1c1c63
1 changed files with 43 additions and 0 deletions
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43
src/soc/intel/xeon_sp/smihandler.c
View File

@ -1,12 +1,55 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/io.h>
#include <console/console.h>
#include <console/uart.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
#include <drivers/uart/uart8250reg.h>
#include <intelblocks/smihandler.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
struct uart8250_state {
uint8_t IER, IIR, MCR, LCR, DLL, DLM;
};
static struct uart8250_state s_uart8250_state;
static void uart8250_store(unsigned int base_port)
{
/* Save previous state for restoring later. */
s_uart8250_state.IER = inb(base_port + UART8250_IER);
s_uart8250_state.IIR = inb(base_port + UART8250_FCR);
s_uart8250_state.MCR = inb(base_port + UART8250_MCR);
s_uart8250_state.LCR = inb(base_port + UART8250_LCR);
s_uart8250_state.DLL = inb(base_port + UART8250_DLL);
s_uart8250_state.DLM = inb(base_port + UART8250_DLM);
}
void smm_soc_early_init(void)
{
if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI))
uart8250_store(uart_platform_base(CONFIG_UART_FOR_CONSOLE));
}
static void uart8250_restore(unsigned int base_port)
{
outb(s_uart8250_state.DLL, base_port + UART8250_DLL);
outb(s_uart8250_state.DLM, base_port + UART8250_DLM);
outb(s_uart8250_state.MCR, base_port + UART8250_MCR);
outb(s_uart8250_state.LCR, base_port + UART8250_LCR);
if ((s_uart8250_state.IIR & UART8250_IIR_FIFO_EN) == UART8250_IIR_FIFO_EN)
outb(UART8250_FCR_FIFO_EN, base_port + UART8250_FCR);
outb(s_uart8250_state.IER, base_port + UART8250_IER);
}
void smm_soc_exit(void)
{
if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI))
uart8250_restore(uart_platform_base(CONFIG_UART_FOR_CONSOLE));
}
/*
* Specific SOC SMI handler during ramstage finalize phase
*/