From e284ca26bf57c9a0c660c77f1b1ba906afef9952 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 16 Feb 2022 01:53:20 +0530 Subject: [PATCH] =?UTF-8?q?soc/intel/apollolake:=20Create=20alias=C2=A0for?= =?UTF-8?q?=20GEN=5FPMCON1=20as=20GEN=5FPMCON=5FA?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch creates alias for GEN_PMCON_A to maintain parity with other IA SoC PMC register definitions. Signed-off-by: Subrata Banik Change-Id: Id9a23c58a325cb544c50cbda432fe3117eea22fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/61984 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh Reviewed-by: Nick Vaccaro --- src/soc/intel/apollolake/include/soc/pm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index aec5e2c0db..3c0b1e7cf8 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -152,6 +152,7 @@ /* Memory mapped IO registers behind PMC_BASE_ADDRESS */ #define PRSTS 0x1000 #define GEN_PMCON1 0x1020 +#define GEN_PMCON_A GEN_PMCON1 #define COLD_BOOT_STS (1 << 27) #define COLD_RESET_STS (1 << 26) #define WARM_RESET_STS (1 << 25)