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mb/google/zork/variants/baseboard: USB2 HS phy settings 

Set default USB2 HS disconnect threshold to maximum to avoid false
disconnects that eventually lock up the xHCI controller

BUG=b:174538960

TEST=suspend_stress_test -c 50 on vilboz and morphius.
     Sample set of USB2 HS devices connect and disconnect
     successfully

Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: Ic921d850a0bdd717a2a7e50e9e6f65e39e0607bf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51265
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Julian Schroeder 2021-03-04 15:50:41 -06:00 committed by Felix Held
parent a16a09f869
commit e286ef9f41
2 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
View File

@ -65,7 +65,7 @@ chip soc/amd/picasso
# Controller0 Port0 Default
register "usb_2_port_tune_params[0]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -78,7 +78,7 @@ chip soc/amd/picasso
# Controller0 Port1 Default
register "usb_2_port_tune_params[1]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -91,7 +91,7 @@ chip soc/amd/picasso
# Controller0 Port2 Default
register "usb_2_port_tune_params[2]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -104,7 +104,7 @@ chip soc/amd/picasso
# Controller0 Port3 Default
register "usb_2_port_tune_params[3]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -117,7 +117,7 @@ chip soc/amd/picasso
# Controller1 Port0 Default
register "usb_2_port_tune_params[4]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
@ -130,7 +130,7 @@ chip soc/amd/picasso
# Controller1 Port1 Default
register "usb_2_port_tune_params[5]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,

12
src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
View File

@ -58,7 +58,7 @@ chip soc/amd/picasso
# Controller0 Port0 Default
register "usb_2_port_tune_params[0]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -71,7 +71,7 @@ chip soc/amd/picasso
# Controller0 Port1 Default
register "usb_2_port_tune_params[1]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -84,7 +84,7 @@ chip soc/amd/picasso
# Controller0 Port2 Default
register "usb_2_port_tune_params[2]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -97,7 +97,7 @@ chip soc/amd/picasso
# Controller0 Port3 Default
register "usb_2_port_tune_params[3]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@ -110,7 +110,7 @@ chip soc/amd/picasso
# Controller1 Port0 Default
register "usb_2_port_tune_params[4]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
@ -123,7 +123,7 @@ chip soc/amd/picasso
# Controller1 Port1 Default
register "usb_2_port_tune_params[5]" = "{
.com_pds_tune = 0x03,
.com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,