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mb/google/poppy/variant/nocturne: use PLTRST for GPP_C11 

GPP_C11 (FPMCU_INT_L) was set to DEEP, causing problems with S3.
Changed GPP_C11 configuration to use PLTRST instead.

BUG=b:114196791
TEST=Build, flash, boot nocturne, log in to kernel and execute
the following two commands and verify it passes :
  echo 0 > /var/lib/power_manager/suspend_to_idle && restart powerd
  sudo suspend_stress_test -c 2

Change-Id: I008532fce963c51a435378001440ac72b5ebfffc
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/29429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Nick Vaccaro 2018-11-01 16:40:31 -07:00 committed by Patrick Georgi
parent 1e6a889752
commit e28d39180d
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/poppy/variants/nocturne/gpio.c
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@ -135,7 +135,7 @@ static const struct pad_config gpio_table[] = {
/* C10 : UART0_RTS# ==> PCH_FPMCU_RST_ODL */ /* C10 : UART0_RTS# ==> PCH_FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_C10, 1, DEEP), PAD_CFG_GPO(GPP_C10, 1, DEEP),
/* C11 : UART0_CTS# ==> FPMCU_INT */ /* C11 : UART0_CTS# ==> FPMCU_INT */
PAD_CFG_GPI_APIC(GPP_C11, 20K_PU, DEEP), PAD_CFG_GPI_APIC(GPP_C11, 20K_PU, PLTRST),
/* C12 : UART1_RXD ==> PCH_MEM_CONFIG[0] */ /* C12 : UART1_RXD ==> PCH_MEM_CONFIG[0] */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP), PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP),
/* C13 : UART1_TXD ==> PCH_MEM_CONFIG[1] */ /* C13 : UART1_TXD ==> PCH_MEM_CONFIG[1] */