GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/mendocino: Remove GPP bridge to Bus B 

The internal GPP bridge to bus B is not used on MDN, so remove it.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I4f95afd192c5b799b7a3e12650476b7933cdd118
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73863
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Martin Roth 2023-03-20 13:27:34 -06:00 committed by Fred Reitberger
parent 14701a4df3
commit e32565cd2d
1 changed files with 0 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/amd/mendocino/chipset_mendocino.cb
View File

@ -63,7 +63,6 @@ chip soc/amd/mendocino
device pci 0.6 alias hda off end # Audio Processor HD Audio Controller (main AZ) device pci 0.6 alias hda off end # Audio Processor HD Audio Controller (main AZ)
device pci 0.7 alias mp2 off end # Sensor Fusion Hub (MP2) device pci 0.7 alias mp2 off end # Sensor Fusion Hub (MP2)
end end
device pci 08.2 alias gpp_bridge_b off ops amd_internal_pcie_gpp_ops end # Internal GPP Bridge 1 to Bus B
device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C
ops amd_internal_pcie_gpp_ops ops amd_internal_pcie_gpp_ops
device pci 0.0 alias xhci_2 off end # Might also be a dummy device with different PCI DID device pci 0.0 alias xhci_2 off end # Might also be a dummy device with different PCI DID