sio/ite/common: Add generic environment-controller driver
The environment-controller entity is shared by many ITE super-i/o chips. There are some differences between the chips, though. To cover that, the super-i/o chip should select Kconfig options of this driver accordingly. The current implementation isn't exhaustive: It covers only those parts that are connected on boards I could test, plus those that are currently used by the IT8772F. The latter could be ported to use this driver if somebody minds to test it. Change-Id: I7a40f677f667d103ce1d09a3e468915729067803 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17284 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Nico Huber
Nico Huber
parent
c70cc4d70d
commit
e34e178ca3
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@ -16,6 +16,9 @@
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## include generic ite pre-ram stage driver
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romstage-$(CONFIG_SUPERIO_ITE_COMMON_ROMSTAGE) += common/early_serial.c
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## include generic ite environment controller driver
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ramstage-$(CONFIG_SUPERIO_ITE_ENV_CTRL) += common/env_ctrl.c
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subdirs-y += it8671f
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subdirs-y += it8712f
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subdirs-y += it8716f
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@ -3,6 +3,7 @@
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##
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## Copyright (C) 2009 Ronald G. Minnich
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## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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## Copyright (C) 2016 secunet Security Networks AG
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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@ -18,3 +19,26 @@
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# romstage.
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config SUPERIO_ITE_COMMON_ROMSTAGE
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bool
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# Generic ITE environment controller driver
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config SUPERIO_ITE_ENV_CTRL
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bool
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if SUPERIO_ITE_ENV_CTRL
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config SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG
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bool
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help
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Enable extended, 16-bit wide tacho counters.
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config SUPERIO_ITE_ENV_CTRL_8BIT_PWM
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bool
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help
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PWM duty cycles are set in 8-bit registers (instead of 7 bit).
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config SUPERIO_ITE_ENV_CTRL_PWM_FREQ2
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bool
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help
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The second FAN controller has a separate frequency setting.
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endif
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@ -0,0 +1,250 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
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* Copyright (C) 2016 secunet Security Networks AG
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdlib.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <delay.h>
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#include "env_ctrl.h"
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#include "env_ctrl_chip.h"
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static inline u8 ite_ec_read(const u16 base, const u8 addr)
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{
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outb(addr, base + 5);
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return inb(base + 6);
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}
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static inline void ite_ec_write(const u16 base, const u8 addr, const u8 value)
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{
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outb(addr, base + 5);
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outb(value, base + 6);
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}
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static void extemp_force_idle_status(const u16 base)
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{
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u8 reg;
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int retries = 10;
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/* Wait up to 10ms for non-busy state. */
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while (retries > 0) {
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reg = ite_ec_read(base, ITE_EC_EXTEMP_STATUS);
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if ((reg & ITE_EC_EXTEMP_STATUS_HOST_BUSY) == 0x0)
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break;
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retries--;
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mdelay(1);
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}
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if (retries == 0 && (reg & ITE_EC_EXTEMP_STATUS_HOST_BUSY) == 0x1) {
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/*
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* SIO is busy due to unfinished peci transaction.
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* Re-configure Register 0x8E to terminate processes.
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*/
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ite_ec_write(base, ITE_EC_EXTEMP_CONTROL,
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ITE_EC_EXTEMP_CTRL_AUTO_4HZ |
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ITE_EC_EXTEMP_CTRL_AUTO_START);
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}
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}
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/*
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* Setup External Temperature to read via PECI into TMPINx register
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*/
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static void enable_peci(const u16 base, const u8 tmpin)
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{
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if (tmpin == 0 || tmpin > ITE_EC_TMPIN_CNT)
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return;
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/* Enable PECI interface */
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ite_ec_write(base, ITE_EC_INTERFACE_SELECT,
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ITE_EC_INTERFACE_SEL_PECI |
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ITE_EC_INTERFACE_SPEED_TOLERANCE);
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/* Setup External Temperature using PECI GetTemp */
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ite_ec_write(base, ITE_EC_EXTEMP_ADDRESS,
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PECI_CLIENT_ADDRESS);
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ite_ec_write(base, ITE_EC_EXTEMP_COMMAND,
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PECI_GETTEMP_COMMAND);
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ite_ec_write(base, ITE_EC_EXTEMP_WRITE_LENGTH,
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PECI_GETTEMP_WRITE_LENGTH);
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ite_ec_write(base, ITE_EC_EXTEMP_READ_LENGTH,
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PECI_GETTEMP_READ_LENGTH);
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ite_ec_write(base, ITE_EC_EXTEMP_CONTROL,
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ITE_EC_EXTEMP_CTRL_AUTO_4HZ |
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ITE_EC_EXTEMP_CTRL_AUTO_START);
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/* External Temperature reported in TMPINx register */
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ite_ec_write(base, ITE_EC_ADC_TEMP_CHANNEL_ENABLE,
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(tmpin & 3) << 6);
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}
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/*
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* Set up External Temperature to read via thermal diode/resistor
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* into TMPINx register
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*/
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static void enable_tmpin(const u16 base, const int tmpin,
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const enum ite_ec_thermal_mode mode)
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{
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u8 reg;
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reg = ite_ec_read(base, ITE_EC_ADC_TEMP_CHANNEL_ENABLE);
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switch (mode) {
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case THERMAL_DIODE:
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reg |= ITE_EC_ADC_TEMP_DIODE_MODE(tmpin);
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break;
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case THERMAL_RESISTOR:
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reg |= ITE_EC_ADC_TEMP_RESISTOR_MODE(tmpin);
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break;
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default:
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printk(BIOS_WARNING,
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"Unsupported thermal mode 0x%x on TMPIN%d\n",
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mode, tmpin);
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return;
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}
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ite_ec_write(base, ITE_EC_ADC_TEMP_CHANNEL_ENABLE, reg);
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/* Enable the startup of monitoring operation */
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reg = ite_ec_read(base, ITE_EC_CONFIGURATION);
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reg |= ITE_EC_CONFIGURATION_START;
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ite_ec_write(base, ITE_EC_CONFIGURATION, reg);
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}
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static void fan_smartconfig(const u16 base, const u8 fan,
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const enum ite_ec_fan_mode mode,
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const struct ite_ec_fan_smartconfig *const conf)
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{
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u8 pwm_ctrl;
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u8 pwm_start = 0;
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u8 pwm_auto = 0;
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if (mode == FAN_SMART_SOFTWARE) {
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pwm_ctrl = ITE_EC_FAN_CTL_PWM_MODE_SOFTWARE;
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/* 50% duty cycle by default */
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const u8 duty = conf->pwm_start ? conf->pwm_start : 50;
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if (IS_ENABLED(CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM))
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pwm_start = ITE_EC_FAN_CTL_PWM_DUTY(duty);
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else
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pwm_ctrl |= ITE_EC_FAN_CTL_PWM_DUTY(duty);
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} else {
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pwm_ctrl = ITE_EC_FAN_CTL_PWM_MODE_AUTOMATIC;
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pwm_ctrl |= ITE_EC_FAN_CTL_TEMPIN(conf->tmpin);
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pwm_start = ITE_EC_FAN_CTL_PWM_START_DUTY(conf->pwm_start);
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pwm_start |= ITE_EC_FAN_CTL_PWM_SLOPE_BIT6(conf->slope);
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pwm_auto = ITE_EC_FAN_CTL_PWM_SLOPE_LOWER(conf->slope);
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ite_ec_write(base, ITE_EC_FAN_CTL_TEMP_LIMIT_OFF(fan),
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conf->tmp_off);
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ite_ec_write(base, ITE_EC_FAN_CTL_TEMP_LIMIT_START(fan),
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conf->tmp_start);
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/* Full speed above 127°C by default */
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ite_ec_write(base, ITE_EC_FAN_CTL_TEMP_LIMIT_FULL(fan),
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conf->tmp_full ? conf->tmp_full : 127);
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ite_ec_write(base, ITE_EC_FAN_CTL_DELTA_TEMP(fan),
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ITE_EC_FAN_CTL_DELTA_TEMP_INTRVL(conf->tmp_delta));
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}
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ite_ec_write(base, ITE_EC_FAN_CTL_PWM_CONTROL(fan), pwm_ctrl);
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ite_ec_write(base, ITE_EC_FAN_CTL_PWM_START(fan), pwm_start);
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ite_ec_write(base, ITE_EC_FAN_CTL_PWM_AUTO(fan), pwm_auto);
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}
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static void enable_fan(const u16 base, const u8 fan,
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const struct ite_ec_fan_config *const conf)
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{
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u8 reg;
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if (conf->mode == FAN_IGNORE)
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return;
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/* FAN_CTL2 might have its own frequency setting */
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if (IS_ENABLED(CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2) && fan == 2) {
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reg = ite_ec_read(base, ITE_EC_ADC_TEMP_EXTRA_CHANNEL_ENABLE);
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reg &= ~ITE_EC_FAN_PWM_CLOCK_MASK;
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reg |= ITE_EC_FAN_PWM_DEFAULT_CLOCK;
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ite_ec_write(base, ITE_EC_ADC_TEMP_EXTRA_CHANNEL_ENABLE, reg);
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}
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if (conf->mode >= FAN_SMART_SOFTWARE) {
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fan_smartconfig(base, fan, conf->mode, &conf->smart);
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} else {
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reg = ite_ec_read(base, ITE_EC_FAN_CTL_MODE);
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if (conf->mode == FAN_MODE_ON)
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reg |= ITE_EC_FAN_CTL_ON(fan);
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else
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reg &= ~ITE_EC_FAN_CTL_ON(fan);
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ite_ec_write(base, ITE_EC_FAN_CTL_MODE, reg);
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}
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if (IS_ENABLED(SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG)
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&& conf->mode >= FAN_MODE_ON) {
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reg = ite_ec_read(base, ITE_EC_FAN_TAC_COUNTER_ENABLE);
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reg |= ITE_EC_FAN_TAC_16BIT_ENABLE(fan);
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ite_ec_write(base, ITE_EC_FAN_TAC_COUNTER_ENABLE, reg);
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}
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reg = ite_ec_read(base, ITE_EC_FAN_MAIN_CTL);
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if (conf->mode >= FAN_MODE_ON)
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reg |= ITE_EC_FAN_MAIN_CTL_TAC_EN(fan);
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else
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reg &= ~ITE_EC_FAN_MAIN_CTL_TAC_EN(fan);
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if (conf->mode >= FAN_SMART_SOFTWARE)
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reg |= ITE_EC_FAN_MAIN_CTL_SMART(fan);
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else
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reg &= ~ITE_EC_FAN_MAIN_CTL_SMART(fan);
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ite_ec_write(base, ITE_EC_FAN_MAIN_CTL, reg);
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}
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void ite_ec_init(const u16 base, const struct ite_ec_config *const conf)
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{
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size_t i;
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/* Configure 23.43kHz PWM active high output */
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u8 fan_ctl = ite_ec_read(base, ITE_EC_FAN_CTL_MODE);
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fan_ctl &= ~ITE_EC_FAN_PWM_CLOCK_MASK;
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fan_ctl |= ITE_EC_FAN_PWM_DEFAULT_CLOCK;
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fan_ctl |= ITE_EC_FAN_CTL_POLARITY_HIGH;
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ite_ec_write(base, ITE_EC_FAN_CTL_MODE, fan_ctl);
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/* Enable PECI if configured */
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enable_peci(base, conf->peci_tmpin);
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/* Enable HWM if configured */
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for (i = 0; i < ITE_EC_TMPIN_CNT; ++i)
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enable_tmpin(base, i + 1, conf->tmpin_mode[i]);
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/* Enable reading of voltage pins */
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ite_ec_write(base, ITE_EC_ADC_VOLTAGE_CHANNEL_ENABLE, conf->vin_mask);
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/* Enable FANx if configured */
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for (i = 0; i < ITE_EC_FAN_CNT; ++i)
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enable_fan(base, i + 1, &conf->fan[i]);
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/*
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* System may get wrong temperature data when SIO is in
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* busy state. Therefore, check the status and terminate
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* processes if needed.
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*/
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if (conf->peci_tmpin != 0)
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extemp_force_idle_status(base);
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}
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@ -0,0 +1,135 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
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* Copyright (C) 2016 secunet Security Networks AG
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef SUPERIO_ITE_ENV_CTRL_H
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#define SUPERIO_ITE_ENV_CTRL_H
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#include "env_ctrl_chip.h"
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#if IS_ENABLED(CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM)
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#define ITE_EC_FAN_MAX_PWM 0xff
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#define ITE_EC_FAN_PWM_DEFAULT_CLOCK ITE_EC_FAN_PWM_CLOCK_6MHZ
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#else
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#define ITE_EC_FAN_MAX_PWM 0x7f
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#define ITE_EC_FAN_PWM_DEFAULT_CLOCK ITE_EC_FAN_PWM_CLOCK_3MHZ
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#endif
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#define ITE_EC_CONFIGURATION 0x00
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#define ITE_EC_CONFIGURATION_START (1 << 0)
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#define ITE_EC_INTERFACE_SELECT 0x0a
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#define ITE_EC_INTERFACE_PSEUDO_EOC (1 << 7)
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#define ITE_EC_INTERFACE_SMB_ENABLE (1 << 6)
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#define ITE_EC_INTERFACE_SEL_DISABLE (0 << 4)
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#define ITE_EC_INTERFACE_SEL_SST_SLAVE (1 << 4)
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#define ITE_EC_INTERFACE_SEL_PECI (2 << 4)
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#define ITE_EC_INTERFACE_SEL_SST_HOST (3 << 4)
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#define ITE_EC_INTERFACE_CLOCK_32MHZ (0 << 3)
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#define ITE_EC_INTERFACE_CLOCK_24MHZ (1 << 3)
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#define ITE_EC_INTERFACE_SPEED_TOLERANCE (1 << 2)
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#define ITE_EC_INTERFACE_PECI_AWFCS (1 << 0)
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#define ITE_EC_FAN_PWM_SMOOTHING_FREQ 0x0b
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#define ITE_EC_FAN_PWM_SMOOTHING_MASK (3 << 6)
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#define ITE_EC_FAN_PWM_SMOOTHING_1KHZ (0 << 6)
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#define ITE_EC_FAN_PWM_SMOOTHING_256HZ (1 << 6)
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#define ITE_EC_FAN_PWM_SMOOTHING_64HZ (2 << 6)
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#define ITE_EC_FAN_PWM_SMOOTHING_16HZ (3 << 6)
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#define ITE_EC_FAN_TAC_COUNTER_ENABLE 0x0c
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#define ITE_EC_FAN_TAC_16BIT_ENABLE(x) (1 << ((x)-1))
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#define ITE_EC_FAN_TAC_LIMIT(x) (0x10 + ((x)-1))
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#define ITE_EC_FAN_TAC_EXT_LIMIT(x) (0x1b + ((x)-1))
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#define ITE_EC_FAN_MAIN_CTL 0x13
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#define ITE_EC_FAN_MAIN_CTL_TAC_EN(x) (1 << ((x)+3))
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#define ITE_EC_FAN_MAIN_CTL_COLL_FULL_SPEED (1 << 3)
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#define ITE_EC_FAN_MAIN_CTL_SMART(x) (1 << ((x)-1))
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#define ITE_EC_FAN_CTL_MODE 0x14
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#define ITE_EC_FAN_CTL_POLARITY_HIGH (1 << 7)
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#define ITE_EC_FAN_PWM_CLOCK_MASK (7 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_48MHZ (0 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_24MHZ (1 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_12MHZ (2 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_8MHZ (3 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_6MHZ (4 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_3MHZ (5 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_1_5MHZ (6 << 4)
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#define ITE_EC_FAN_PWM_CLOCK_51KHZ (7 << 4)
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#define ITE_EC_FAN_PWM_MIN_DUTY_20 (1 << 3)
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#define ITE_EC_FAN_CTL_ON(x) (1 << ((x)-1))
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#define ITE_EC_FAN_CTL_PWM_CONTROL(x) (0x15 + ((x)-1))
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#define ITE_EC_FAN_CTL_PWM_MODE_SOFTWARE (0 << 7)
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#define ITE_EC_FAN_CTL_PWM_MODE_AUTOMATIC (1 << 7)
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#define ITE_EC_FAN_CTL_PWM_DUTY_MASK (ITE_EC_FAN_MAX_PWM << 0)
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#define ITE_EC_FAN_CTL_PWM_DUTY(p) \
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({ \
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const unsigned int _p = p; \
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(_p >= 100) \
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? ITE_EC_FAN_MAX_PWM \
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: (_p * ITE_EC_FAN_MAX_PWM) / 100; \
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})
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#define ITE_EC_FAN_CTL_TEMPIN_MASK (3 << 0)
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#define ITE_EC_FAN_CTL_TEMPIN(x) (((x)-1) & 3)
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#define ITE_EC_ADC_VOLTAGE_CHANNEL_ENABLE 0x50
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#define ITE_EC_ADC_TEMP_CHANNEL_ENABLE 0x51
|
||||
#define ITE_EC_ADC_TEMP_EXT_REPORTS_TO(x) (((x) & 3) << 6)
|
||||
#define ITE_EC_ADC_TEMP_RESISTOR_MODE(x) (1 << ((x)+2))
|
||||
#define ITE_EC_ADC_TEMP_DIODE_MODE(x) (1 << ((x)-1))
|
||||
#define ITE_EC_ADC_TEMP_EXTRA_CHANNEL_ENABLE 0x55
|
||||
|
||||
#define ITE_EC_FAN_CTL_TEMP_LIMIT_OFF(x) (0x60 + ((x)-1) * 8)
|
||||
#define ITE_EC_FAN_CTL_TEMP_LIMIT_START(x) (0x61 + ((x)-1) * 8)
|
||||
#define ITE_EC_FAN_CTL_TEMP_LIMIT_FULL(x) (0x62 + ((x)-1) * 8)
|
||||
#define ITE_EC_FAN_CTL_PWM_START(x) (0x63 + ((x)-1) * 8)
|
||||
#define ITE_EC_FAN_CTL_PWM_SLOPE_BIT6(s) (((s) & 0x40) << 1)
|
||||
#define ITE_EC_FAN_CTL_PWM_START_DUTY(p) ITE_EC_FAN_CTL_PWM_DUTY(p)
|
||||
#define ITE_EC_FAN_CTL_PWM_AUTO(x) (0x64 + ((x)-1) * 8)
|
||||
#define ITE_EC_FAN_CTL_AUTO_SMOOTHING_EN (1 << 7)
|
||||
#define ITE_EC_FAN_CTL_PWM_SLOPE_LOWER(s) ((s) & 0x3f)
|
||||
#define ITE_EC_FAN_CTL_DELTA_TEMP(x) (0x65 + ((x)-1) * 8)
|
||||
#define ITE_EC_FAN_CTL_DELTA_TEMP_INTRVL(c) ((c) & 0x1f)
|
||||
|
||||
#define ITE_EC_EXTEMP_STATUS 0x88
|
||||
#define ITE_EC_EXTEMP_STATUS_HOST_BUSY (1 << 0)
|
||||
#define ITE_EC_EXTEMP_ADDRESS 0x89
|
||||
#define ITE_EC_EXTEMP_WRITE_LENGTH 0x8a
|
||||
#define ITE_EC_EXTEMP_READ_LENGTH 0x8b
|
||||
#define ITE_EC_EXTEMP_COMMAND 0x8c
|
||||
#define ITE_EC_EXTEMP_WRITE_DATA_2 0x8d
|
||||
#define ITE_EC_EXTEMP_CONTROL 0x8e
|
||||
#define ITE_EC_EXTEMP_CTRL_AUTO_32HZ (0 << 6)
|
||||
#define ITE_EC_EXTEMP_CTRL_AUTO_16HZ (1 << 6)
|
||||
#define ITE_EC_EXTEMP_CTRL_AUTO_8HZ (2 << 6)
|
||||
#define ITE_EC_EXTEMP_CTRL_AUTO_4HZ (3 << 6)
|
||||
#define ITE_EC_EXTEMP_CTRL_AUTO_START (1 << 5)
|
||||
#define ITE_EC_EXTEMP_CTRL_AUTO_ABORT (1 << 4)
|
||||
#define ITE_EC_EXTEMP_CTRL_AUTO_TWO_DOMAIN (1 << 3)
|
||||
#define ITE_EC_EXTEMP_CTRL_CONTENTION (1 << 2)
|
||||
#define ITE_EC_EXTEMP_CTRL_SST_IDLE_HIGH (1 << 1)
|
||||
#define ITE_EC_EXTEMP_CTRL_START (1 << 0)
|
||||
|
||||
/* Standard PECI GetTemp */
|
||||
#define PECI_CLIENT_ADDRESS 0x30
|
||||
#define PECI_GETTEMP_COMMAND 0x01
|
||||
#define PECI_GETTEMP_WRITE_LENGTH 0x01
|
||||
#define PECI_GETTEMP_READ_LENGTH 0x02
|
||||
|
||||
void ite_ec_init(u16 base, const struct ite_ec_config *conf);
|
||||
|
||||
#endif /* SUPERIO_ITE_ENV_CTRL_H */
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
|
||||
* Copyright (C) 2016 secunet Security Networks AG
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef SUPERIO_ITE_ENV_CTRL_CHIP_H
|
||||
#define SUPERIO_ITE_ENV_CTRL_CHIP_H
|
||||
|
||||
#define ITE_EC_TMPIN_CNT 3
|
||||
#define ITE_EC_FAN_CNT 3
|
||||
|
||||
/* Supported thermal mode on TMPINx */
|
||||
enum ite_ec_thermal_mode {
|
||||
THERMAL_MODE_DISABLED = 0,
|
||||
THERMAL_DIODE,
|
||||
THERMAL_RESISTOR,
|
||||
};
|
||||
|
||||
/* Bit mask for voltage pins VINx */
|
||||
enum ite_ec_voltage_pin {
|
||||
VIN0 = 0x01,
|
||||
VIN1 = 0x02,
|
||||
VIN2 = 0x04,
|
||||
VIN3 = 0x08,
|
||||
VIN4 = 0x10,
|
||||
VIN5 = 0x20,
|
||||
VIN6 = 0x40,
|
||||
VIN7 = 0x80,
|
||||
VIN_ALL = 0xff
|
||||
};
|
||||
|
||||
enum ite_ec_fan_mode {
|
||||
FAN_IGNORE = 0,
|
||||
FAN_MODE_ON,
|
||||
FAN_MODE_OFF,
|
||||
FAN_SMART_SOFTWARE,
|
||||
FAN_SMART_AUTOMATIC,
|
||||
};
|
||||
|
||||
struct ite_ec_fan_smartconfig {
|
||||
u8 tmpin; /* select TMPINx (1, 2 or 3) */
|
||||
u8 tmp_off; /* turn fan off below (°C) */
|
||||
u8 tmp_start; /* turn fan on above (°C) */
|
||||
u8 tmp_full; /* 100% duty cycle above (°C) */
|
||||
u8 tmp_delta; /* adapt fan speed when temperature
|
||||
changed by at least `tmp_delta`°C */
|
||||
u8 smoothing; /* enable smoothing */
|
||||
u8 pwm_start; /* start at this duty cycle (%) */
|
||||
u8 slope; /* increase duty cycle by `slope`%/°C */
|
||||
};
|
||||
|
||||
struct ite_ec_fan_config {
|
||||
enum ite_ec_fan_mode mode;
|
||||
struct ite_ec_fan_smartconfig smart;
|
||||
};
|
||||
|
||||
struct ite_ec_config {
|
||||
/*
|
||||
* Enable external temperature sensor to use PECI GetTemp()
|
||||
* command and store in register TMPIN 1, 2, or 3.
|
||||
*/
|
||||
u8 peci_tmpin;
|
||||
|
||||
/*
|
||||
* Enable thermal mode on TMPINx.
|
||||
*/
|
||||
enum ite_ec_thermal_mode tmpin_mode[ITE_EC_TMPIN_CNT];
|
||||
|
||||
/*
|
||||
* Enable reading of voltage pins VINx.
|
||||
*/
|
||||
enum ite_ec_voltage_pin vin_mask;
|
||||
|
||||
/*
|
||||
* Enable a FAN in given mode.
|
||||
*/
|
||||
struct ite_ec_fan_config fan[ITE_EC_FAN_CNT];
|
||||
};
|
||||
|
||||
/* Some shorthands for device trees */
|
||||
#define TMPIN1 ec.tmpin_mode[0]
|
||||
#define TMPIN2 ec.tmpin_mode[1]
|
||||
#define TMPIN3 ec.tmpin_mode[2]
|
||||
#define FAN1 ec.fan[0]
|
||||
#define FAN2 ec.fan[1]
|
||||
#define FAN3 ec.fan[2]
|
||||
|
||||
#endif /* SUPERIO_ITE_ENV_CTRL_CHIP_H */
|
||||
Loading…
Reference in New Issue