From e369010ab872aa4d90ef99af95a50cdd8353520e Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Wed, 6 Jan 2016 15:21:02 -0700 Subject: [PATCH] arch/x86: Indent using tabs not spaces No functional changes - just whitespace fixes. Signed-off-by: Martin Roth Change-Id: I8ffa87240bcbd3d657ed9dc619b5e5bf9de734d7 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/12853 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/arch/x86/acpigen.c | 2 +- src/arch/x86/boot.c | 4 +- src/arch/x86/c_start.S | 32 +++++----- src/arch/x86/cpu.c | 4 +- src/arch/x86/include/arch/cpu.h | 22 +++---- src/arch/x86/include/arch/io.h | 82 +++++++++++++------------- src/arch/x86/include/arch/pci_io_cfg.h | 26 ++++---- src/arch/x86/tables.c | 6 +- 8 files changed, 89 insertions(+), 89 deletions(-) diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c index c1a09f261d..1a23bdc1a0 100644 --- a/src/arch/x86/acpigen.c +++ b/src/arch/x86/acpigen.c @@ -653,7 +653,7 @@ void acpigen_write_resourcetemplate_footer(void) acpigen_emit_byte(0x79); acpigen_emit_byte(0x00); - len = gencurrent - p; + len = gencurrent - p; /* patch len word */ p[0] = len & 0xff; diff --git a/src/arch/x86/boot.c b/src/arch/x86/boot.c index f7c35825af..71b79fe12a 100644 --- a/src/arch/x86/boot.c +++ b/src/arch/x86/boot.c @@ -106,14 +106,14 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) /* Save the parameters I was passed */ #ifdef __x86_64__ " pushl $0\n\t" /* 20 adjust */ - " pushl %%eax\n\t" /* 16 lb_start */ + " pushl %%eax\n\t" /* 16 lb_start */ " pushl %%ebx\n\t" /* 12 buffer */ " pushl %%ecx\n\t" /* 8 lb_size */ " pushl %%edx\n\t" /* 4 entry */ " pushl %%esi\n\t" /* 0 elf_boot_notes */ #else " pushl $0\n\t" /* 20 adjust */ - " pushl %0\n\t" /* 16 lb_start */ + " pushl %0\n\t" /* 16 lb_start */ " pushl %1\n\t" /* 12 buffer */ " pushl %2\n\t" /* 8 lb_size */ " pushl %3\n\t" /* 4 entry */ diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index 75716c8200..124bfa84bf 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -402,26 +402,26 @@ _idt_end: SetCodeSelector: .intel_syntax noprefix - # save rsp because iret will align it to a 16 byte boundary - mov rdx, rsp + # save rsp because iret will align it to a 16 byte boundary + mov rdx, rsp - # use iret to jump to a 64-bit offset in a new code segment - # iret will pop cs:rip, flags, then ss:rsp - mov ax, ss # need to push ss.. - push rax # push ss instuction not valid in x64 mode, so use ax - push rsp - pushfq - push rcx # cx is code segment selector from caller - mov rax, offset setCodeSelectorLongJump - push rax + # use iret to jump to a 64-bit offset in a new code segment + # iret will pop cs:rip, flags, then ss:rsp + mov ax, ss # need to push ss.. + push rax # push ss instuction not valid in x64 mode, so use ax + push rsp + pushfq + push rcx # cx is code segment selector from caller + mov rax, offset setCodeSelectorLongJump + push rax - # the iret will continue at next instruction, with the new cs value loaded - iretq + # the iret will continue at next instruction, with the new cs value loaded + iretq setCodeSelectorLongJump: - # restore rsp, it might not have been 16-byte aligned on entry - mov rsp, rdx - ret + # restore rsp, it might not have been 16-byte aligned on entry + mov rsp, rdx + ret .att_syntax prefix .previous diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index 0d670aa3f9..d46e591ddd 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -107,8 +107,8 @@ static struct { { X86_VENDOR_UMC, "UMC UMC UMC ", }, { X86_VENDOR_NEXGEN, "NexGenDriven", }, { X86_VENDOR_CENTAUR, "CentaurHauls", }, - { X86_VENDOR_RISE, "RiseRiseRise", }, - { X86_VENDOR_TRANSMETA, "GenuineTMx86", }, + { X86_VENDOR_RISE, "RiseRiseRise", }, + { X86_VENDOR_TRANSMETA, "GenuineTMx86", }, { X86_VENDOR_TRANSMETA, "TransmetaCPU", }, { X86_VENDOR_NSC, "Geode by NSC", }, { X86_VENDOR_SIS, "SiS SiS SiS ", }, diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index d03425a9a5..408fa15180 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -217,21 +217,21 @@ static inline unsigned long cpu_index(void) #ifndef __ROMCC__ // romcc is segfaulting in some cases struct cpuinfo_x86 { - uint8_t x86; /* CPU family */ - uint8_t x86_vendor; /* CPU vendor */ - uint8_t x86_model; - uint8_t x86_mask; + uint8_t x86; /* CPU family */ + uint8_t x86_vendor; /* CPU vendor */ + uint8_t x86_model; + uint8_t x86_mask; }; static inline void get_fms(struct cpuinfo_x86 *c, uint32_t tfms) { - c->x86 = (tfms >> 8) & 0xf; - c->x86_model = (tfms >> 4) & 0xf; - c->x86_mask = tfms & 0xf; - if (c->x86 == 0xf) - c->x86 += (tfms >> 20) & 0xff; - if (c->x86 >= 0x6) - c->x86_model += ((tfms >> 16) & 0xF) << 4; + c->x86 = (tfms >> 8) & 0xf; + c->x86_model = (tfms >> 4) & 0xf; + c->x86_mask = tfms & 0xf; + if (c->x86 == 0xf) + c->x86 += (tfms >> 20) & 0xff; + if (c->x86 >= 0x6) + c->x86_model += ((tfms >> 16) & 0xF) << 4; } #endif diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 2f4206188f..a71e1a4e44 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -190,27 +190,27 @@ static inline __attribute__((always_inline)) void write32(volatile void *addr, u #if defined(__ROMCC__) static inline int log2(u32 value) { - unsigned int r = 0; - __asm__ volatile ( - "bsrl %1, %0\n\t" - "jnz 1f\n\t" - "movl $-1, %0\n\t" - "1:\n\t" - : "=r" (r) : "r" (value)); - return r; + unsigned int r = 0; + __asm__ volatile ( + "bsrl %1, %0\n\t" + "jnz 1f\n\t" + "movl $-1, %0\n\t" + "1:\n\t" + : "=r" (r) : "r" (value)); + return r; } static inline int __ffs(u32 value) { - unsigned int r = 0; - __asm__ volatile ( - "bsfl %1, %0\n\t" - "jnz 1f\n\t" - "movl $-1, %0\n\t" - "1:\n\t" - : "=r" (r) : "r" (value)); - return r; + unsigned int r = 0; + __asm__ volatile ( + "bsfl %1, %0\n\t" + "jnz 1f\n\t" + "movl $-1, %0\n\t" + "1:\n\t" + : "=r" (r) : "r" (value)); + return r; } #endif @@ -218,15 +218,15 @@ static inline int __ffs(u32 value) #ifdef __SIMPLE_DEVICE__ #define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \ - (((SEGBUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x07) << 12) | \ - ((WHERE) & 0xFFF)) + (((SEGBUS) & 0xFFF) << 20) | \ + (((DEV) & 0x1F) << 15) | \ + (((FN) & 0x07) << 12) | \ + ((WHERE) & 0xFFF)) #define PCI_DEV(SEGBUS, DEV, FN) ( \ - (((SEGBUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x07) << 12)) + (((SEGBUS) & 0xFFF) << 20) | \ + (((DEV) & 0x1F) << 15) | \ + (((FN) & 0x07) << 12)) #define PCI_ID(VENDOR_ID, DEVICE_ID) \ ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) @@ -267,14 +267,14 @@ void pci_or_config32(pci_devfn_t dev, unsigned where, uint32_t value) #define PCI_DEV_INVALID (0xffffffffU) static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev) { - for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) { - unsigned int id; - id = pci_io_read_config32(dev, 0); - if (id == pci_id) { - return dev; - } - } - return PCI_DEV_INVALID; + for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) { + unsigned int id; + id = pci_io_read_config32(dev, 0); + if (id == pci_id) { + return dev; + } + } + return PCI_DEV_INVALID; } static inline pci_devfn_t pci_locate_device(unsigned pci_id, pci_devfn_t dev) @@ -293,17 +293,17 @@ static inline pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus { pci_devfn_t dev, last; - dev = PCI_DEV(bus, 0, 0); - last = PCI_DEV(bus, 31, 7); + dev = PCI_DEV(bus, 0, 0); + last = PCI_DEV(bus, 31, 7); - for(; dev <=last; dev += PCI_DEV(0,0,1)) { - unsigned int id; - id = pci_read_config32(dev, 0); - if (id == pci_id) { - return dev; - } - } - return PCI_DEV_INVALID; + for(; dev <=last; dev += PCI_DEV(0,0,1)) { + unsigned int id; + id = pci_read_config32(dev, 0); + if (id == pci_id) { + return dev; + } + } + return PCI_DEV_INVALID; } /* Generic functions for pnp devices */ diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h index b5822ba14d..b83853548e 100644 --- a/src/arch/x86/include/arch/pci_io_cfg.h +++ b/src/arch/x86/include/arch/pci_io_cfg.h @@ -34,9 +34,9 @@ uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned where) { unsigned addr; #if !CONFIG_PCI_IO_CFG_EXT - addr = (dev>>4) | where; + addr = (dev>>4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); return inw(0xCFC + (addr & 2)); @@ -47,9 +47,9 @@ uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned where) { unsigned addr; #if !CONFIG_PCI_IO_CFG_EXT - addr = (dev>>4) | where; + addr = (dev>>4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); return inl(0xCFC); @@ -60,9 +60,9 @@ void pci_io_write_config8(pci_devfn_t dev, unsigned where, uint8_t value) { unsigned addr; #if !CONFIG_PCI_IO_CFG_EXT - addr = (dev>>4) | where; + addr = (dev>>4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); outb(value, 0xCFC + (addr & 3)); @@ -71,14 +71,14 @@ void pci_io_write_config8(pci_devfn_t dev, unsigned where, uint8_t value) static inline __attribute__((always_inline)) void pci_io_write_config16(pci_devfn_t dev, unsigned where, uint16_t value) { - unsigned addr; + unsigned addr; #if !CONFIG_PCI_IO_CFG_EXT - addr = (dev>>4) | where; + addr = (dev>>4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); #endif - outl(0x80000000 | (addr & ~3), 0xCF8); - outw(value, 0xCFC + (addr & 2)); + outl(0x80000000 | (addr & ~3), 0xCF8); + outw(value, 0xCFC + (addr & 2)); } static inline __attribute__((always_inline)) @@ -86,9 +86,9 @@ void pci_io_write_config32(pci_devfn_t dev, unsigned where, uint32_t value) { unsigned addr; #if !CONFIG_PCI_IO_CFG_EXT - addr = (dev>>4) | where; + addr = (dev>>4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); outl(value, 0xCFC); diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c index d8d558ddd6..86e2b236a1 100644 --- a/src/arch/x86/tables.c +++ b/src/arch/x86/tables.c @@ -123,7 +123,7 @@ void write_tables(void) if (new_high_table_pointer > ( high_table_pointer + MAX_ACPI_SIZE)) { printk(BIOS_ERR, "ERROR: Increase ACPI size\n"); } - printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n", + printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n", new_high_table_pointer - high_table_pointer); /* Now we need to create a low table copy of the RSDP. */ @@ -170,7 +170,7 @@ void write_tables(void) if (new_high_table_pointer > ( high_table_pointer + MAX_SMBIOS_SIZE)) { printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n"); } - printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n", + printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n", new_high_table_pointer - high_table_pointer); } else { unsigned long new_rom_table_end = smbios_write_tables(rom_table_end); @@ -204,7 +204,7 @@ void write_tables(void) __func__, new_high_table_pointer - high_table_pointer); - printk(BIOS_DEBUG, "coreboot table: %ld bytes.\n", + printk(BIOS_DEBUG, "coreboot table: %ld bytes.\n", new_high_table_pointer - high_table_pointer); } else { /* The coreboot table must be in 0-4K or 960K-1M */