From e36fb7434c173e0d2f016a4e3e7af3ced5973726 Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Fri, 12 Jun 2015 19:43:06 -0500 Subject: [PATCH] northbridge/amd/amdmct: Fix hang on boot due to invalid array access Change-Id: I47755caf7d2ff59463c817e739f9cb2ddd367c18 Signed-off-by: Timothy Pearson Reviewed-on: http://review.coreboot.org/11989 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/amd/amdmct/wrappers/mcti_d.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index a030f71e95..fecda0b24d 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -333,7 +333,7 @@ static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat) #if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */ uint8_t dimm; - for (i = 0; i < 15; i = i + 2) { + for (i = 0; i < MAX_DIMMS_SUPPORTED; i = i + 2) { if (pDCTstat->DIMMValid & (1 << i)) ch1_voltage |= pDCTstat->DimmConfiguredVoltage[i]; if (pDCTstat->DIMMValid & (1 << (i + 1))) @@ -343,7 +343,7 @@ static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat) for (i = 0; i < 2; i++) { sDCTStruct *pDCTData = pDCTstat->C_DCTPtr[i]; highest_rank_count[i] = 0x0; - for (dimm = 0; dimm < 8; dimm++) { + for (dimm = 0; dimm < MAX_DIMMS_SUPPORTED; dimm++) { if (pDCTData->DimmRanks[dimm] > highest_rank_count[i]) highest_rank_count[i] = pDCTData->DimmRanks[dimm]; }