arm64: psci: actually inform SoC layer of CPU_ON entry

psci_soc_init() was added to allow SoC PSCI initialization.
However, actually calling said function was omitted accidentally.

BUG=chrome-os-partner:32136
BRANCH=None
TEST=Built and noted correct on entry point was used.

Change-Id: I84a397e2dabf149fe8f252ef69d0a7362fa1f194
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2a0e6ad41f049bbab483423231db59390894e9b2
Original-Change-Id: I1a4e25fde64ecdc98fa9231f7d9cafc21119630d
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/231935
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9530
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2014-11-25 17:23:22 -06:00 committed by Patrick Georgi
parent 1d1a15d87f
commit e37c18f891
1 changed files with 3 additions and 0 deletions

View File

@ -565,4 +565,7 @@ void psci_init(uintptr_t cpu_on_entry)
/* Register PSCI handlers. */ /* Register PSCI handlers. */
if (smc_register_range(PSCI_CPU_OFF64, PSCI_CPU_ON64, &psci_handler)) if (smc_register_range(PSCI_CPU_OFF64, PSCI_CPU_ON64, &psci_handler))
printk(BIOS_ERR, "Couldn't register PSCI handler.\n"); printk(BIOS_ERR, "Couldn't register PSCI handler.\n");
/* Inform SoC layer of CPU_ON entry point. */
psci_soc_init(cpu_on_entry);
} }